Výsledky vyhledávání - "Kerkhoff, H.G"

Publikováno v: DTIS
IEEE International Conference On Design & Technology of Integrated Systems In Nanoscale Era (DTIS), 1-6
STARTPAGE=1;ENDPAGE=6;TITLE=IEEE International Conference On Design & Technology of Integrated Systems In Nanoscale Era (DTIS)

A new generation of highly dependable multi- processor Systems-on-Chip for safety-critical applications under harsh environments with zero down-time is emerging. In this paper1, the approach towards reaching this ultimate goal is explained. Crucial i

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::33cd73773995cc140865ad75819acc3b
http://eprints.eemcs.utwente.nl/secure2/25174/01/DTIS_2014_Santorini_14_mar_14.pdf

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Exploiting multiple mahalanobis distance metrics to screen outliers from analog product manufacturing test responses

Autor: Krishnan, S., Kerkhoff, H.G.

Publikováno v: IEEE Design and Test, 3, 30, 18-24

Stringent quality requirements on final electronic products are continuously forcing semiconductor industries, especially the automobile industry, to insert additional reliability tests in their production flow. The problem with linear regressions mo

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::c422541b314dee7d85f805323103cf97
http://resolver.tudelft.nl/uuid:ce36ba38-4581-4fe0-a1f7-4094e4dff4d4

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Multivariate model for test response analysis

Autor: Krishnan, S., Kerkhoff, H.G.

Publikováno v: 2010 15th IEEE European Test Symposium, ETS'10, 24 May 2010 through 28 May 2010, Prague. Conference code: 82013, 250

A systematic approach to construct an effective multivariate test response model for capturing manufacturing defects in electronic products is described. The effectiveness of the model is demonstrated by its capability in reducing the number of test-

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::8472fe836bbe12d81ec1ba967c717fec
http://resolver.tudelft.nl/uuid:6c732ee8-98e7-4300-9860-0344c0dd510d

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Small-Delay Fault BIST in High-Speed Chip Interfaces

Autor: Petre, O., Kerkhoff, H.G.

Publikováno v: MESA+ Day 2005
Proceedings SAFE & ProRISC 2004: November 25-26 2004, Veldhoven, the Netherlands, 429-434
STARTPAGE=429;ENDPAGE=434;TITLE=Proceedings SAFE & ProRISC 2004

During the past years, due to the decrease of the minimum feature size in CMOS technology, the on-chip clock frequencies have increased dramatically ranging into the GHz domain. This increase has also pushed the need for higher data-transfer rates be

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::4684cf2708c3443ade3caf6a616b62a1
https://research.utwente.nl/en/publications/smalldelay-fault-bist-in-highspeed-chip-interfaces(cc6607bc-b110-4ed2-b2ad-1af666226243).html

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Determining DfT Hardware by VHDL-AMS Fault Simulation for Biological Micro-Electronic Fluidic Arrays

Autor: Kerkhoff, H.G., Zhang, X., Liu, H., Richardson, A., Nouet, P., Azais, F.

Publikováno v: Overview of the workshops ProRISC-SAFE, November 17-18, 2005, Veldhoven, the Netherlands, 378-382
STARTPAGE=378;ENDPAGE=382;TITLE=Overview of the workshops ProRISC-SAFE, November 17-18, 2005, Veldhoven, the Netherlands

The interest of microelectronic fluidic arrays for biomedical applications, like DNA determination, is rapidly increasing. In order to evaluate these systems in terms of required Design-for-Test structures, fault simulations in both fluidic and elect

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=narcis______::a64b33a364fb59cc2cf160e2abf0ed6f
https://research.utwente.nl/en/publications/determining-dft-hardware-by-vhdlams-fault-simulation-for-biological-microelectronic-fluidic-arrays(3a5a777a-89e5-427d-a362-8b8f58d16494).html

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Synchronous full-scan for asynchronous handshake circuits

Autor: Beest, te, F., Peeters, A.M.G., Berkel, van, C.H., Kerkhoff, H.G.

Publikováno v: Journal of Electronic Testing : Theory and Applications, 19(4), 397-406. Springer

Handshake circuits form a special class of asynchronous circuits that has enabled the industrial exploitation of the asynchronous potential such as low power, low electromagnetic emission, and increased cryptographic security. In this paper we presen

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=narcis______::878e02f6cb4789ecce921d7801c2a55f
https://research.tue.nl/nl/publications/5399aa91-1c2c-4e10-b383-841894801a05

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