Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Kenichi Sami"'
Publikováno v:
IEICE Transactions on Electronics. :529-538
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0c33941e2848a4d4815a464106515ef5
https://doi.org/10.1587/transele.e100.c.529
https://doi.org/10.1587/transele.e100.c.529
Autor:
Kenichi Sami, Tong Wang, Hiroshi Yoshida, Yosuke Ogasawara, Yuki Tuda, Tatsuhiko Maruyama, Takashi Tokairin, Masayoshi Oshiro, Ta Tuan Thanh, Naotaka Koide
Publikováno v:
IEICE Transactions on Electronics. :833-840
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aec2535c9bf9e5264855e6a8c0d03723
https://doi.org/10.1587/transele.e100.c.833
https://doi.org/10.1587/transele.e100.c.833
Autor:
Kenichi Sami, Ichiro Seto, Kenichi Agawa, Daisuke Miyashita, Hirotsugu Kajihara, Ryuichi Fujimoto, Yasuo Unekawa
Publikováno v:
IEICE Transactions on Electronics. :783-789
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::190532c82bce2d5f70fb95dd66ece2c7
https://doi.org/10.1587/transele.e96.c.783
https://doi.org/10.1587/transele.e96.c.783
Autor:
Masayoshi Oshiro, Tatsuhiko Maruyama, Hiroshi Yoshida, Tong Wang, Yuki Tuda, Naotaka Koide, Ta Tuan Thanh, Kenichi Sami, Takashi Tokairin, Yosuke Ogasawara
Publikováno v:
A-SSCC
A fully-integrated system-on-chip (SoC) for Bluetooth Low Energy (BLE) with 3.2 mA RX and 3.5 mA TX current consumption is presented. To achieve both low current consumption and high performance, the SoC employs a sliding-IF architecture that avoids
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::be85c3f46f45094107c336e00db272f4
https://doi.org/10.1109/asscc.2016.7844120
https://doi.org/10.1109/asscc.2016.7844120
Publikováno v:
VLSI Circuits
A novel spur canceled clock generator (SCCG) capable of recovering RX sensitivity degradations caused by digital clocks in wireless SoCs is presented. Clock spurs which degrade RX sensitivity are canceled by applying the SCCG to the digital circuits
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fe93c430209107b436f90c731b743be0
https://doi.org/10.1109/vlsic.2016.7573484
https://doi.org/10.1109/vlsic.2016.7573484
Autor:
Jun Deguchi, Daisuke Miyashita, Mototsugu Hamada, Shoko Oda, Yuki Tsuda, Junji Wadatsumi, Shunji Kawaguchi, Masaomi Iwanaga, Yosuke Ogasawara, Kenichi Sami, Gaku Takemura, Nobuyuki Itoh, Rui Ito
Publikováno v:
IEEE Journal of Solid-State Circuits. 45:2774-2784
This paper presents a fully integrated 2 RX × 1 TX dual-band direct-conversion mobile WiMAX transceiver in a 65 nm CMOS technology. The frequency division ratios of 4 for the low band (2.3-2.7 GHz) and 8/3 for the high band (3.3-3.8 GHz) are employe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::511369607276a455fedd88757d4be3e4
https://doi.org/10.1109/jssc.2010.2075295
https://doi.org/10.1109/jssc.2010.2075295
Autor:
Daisuke Kurose, Ryuichi Fujimoto, Yosuke Ogasawara, Kazumi Sato, Takashi Kurihara, Kenichi Sami, Tomohiko Ito, Hirotsugu Kajihara, Ichiro Seto, Daisuke Miyashita, Toru Hashimoto, Naotaka Koide, Hiroki Sakurai, Masaomi Iwanaga, Kenichi Agawa, Takafumi Yamaji, Yasuo Unekawa, Hiroshi Yoshida
Publikováno v:
VLSIC
TransferJet™ is an emerging high-speed close-proximity wireless communication standard, which enables a data transfer of up to 522Mbps within a few centimeters range. We have developed a fully integrated TransferJet SoC with a 4.48-GHz operating fr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bebfd1b171f120d38207195abe6e73cb
https://doi.org/10.1109/vlsic.2012.6243796
https://doi.org/10.1109/vlsic.2012.6243796
Autor:
Shoko Oda, Junji Wadatsumi, Kenichi Sami, Daisuke Miyashita, Nobuyuki Itoh, Jun Deguchi, Rui Ito, Yuki Tsuda, Yosuke Ogasawara, Gaku Takemura, Mototsugu Hamada, Shunji Kawaguchi, Masaomi Iwanaga
Publikováno v:
ISSCC
Mobile WiMAX complying with the IEEE 802.16e standard is one of the emerging standards and is achieving world-wide penetration. Low-cost implementation is essential and single-chip implementation is a straightforward approach. However, there are many
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a780f698a0035f92e05a28d2696fa0a6
https://doi.org/10.1109/isscc.2010.5433966
https://doi.org/10.1109/isscc.2010.5433966
Autor:
Hiroshi Yoshida, Takayuki Takida, K. Nonin, Kazuyuki Sato, Hiroshi Tsurumi, Kenichi Sami, R. Ito, T. Murasaki, R. Fujimoto, Masato Ishii, Teruo Imayama, H. Shimizu, Takaya Yasuda, K. Osawa, I. Tamura, Gaku Takemura, Yuki Tsuda, Shunji Kawaguchi, Yosuke Ogasawara, Takayuki Kato, H. Kokatsu, Takehiko Toyoda, H. Masuoka, H. Okuni, Masaomi Iwanaga, Masahiro Hosoya, Toru Hashimoto, Nobuyuki Itoh, Y. Araki
Publikováno v:
ESSCIRC
In this paper, a single-chip dual-mode 8-band 130 nm CMOS transceiver including A/D/A converters and digital filters with 312 MHz LVDS interface is presented. For a transmitter chain, linear direct quadrature modulation architecture is introduced for
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8efea30e9c78c558e5e3a16cc43ffa92
https://doi.org/10.1109/esscirc.2008.4681812
https://doi.org/10.1109/esscirc.2008.4681812