Zobrazeno 1 - 10
of 24
pro vyhledávání: '"Ken Rim"'
Autor:
Prasad Rajeevalochanam Bhadri, Suh Youseok, Vicki Lin, Chihwei Kuo, Sam Yang, Jie Deng, Shrihari Siva, S. D. Kwon, Jihong Choi, William Miller, Xiangdong Chen, Hao Wang, Parag A. Agashe, Sungwon Kim, Zhimin Song, Kwon Lee, Lixin Ge, Ying Chen, Ashwin Rabindranath, P. R. Chidambaram, Sunggun Kang, Ken Rim, Jerry Bao, Soon Cho, Jun Yuan, Saechoon Oh, Xiao-Yong Wang, Ming Cai, Paul Ivan Penzes
Publikováno v:
2018 IEEE Symposium on VLSI Technology.
We report on Snapdragon™ SDM845 mobile SoC in mass production with a second-generation 10-nm finFET technology. SDM845 exhibits 30–40% CPU/GPU performance gain over SDM835 (first-generation 10-nm finFET process) together with ~10% battery life in
Autor:
Ping Liu, Sung-Gun Kang, Jackie Yang, S. C. Song, Xiao-Yong Wang, Yanxiang Liu, Jedon Kim, Yandong Gao, Lixin Ge, Suh Youseok, Sam Yang, Jie Deng, Sung-Won Kim, Xiangdong Chen, Peijie Feng, Ken Rim, John Jianhong Zhu, Ming Cai, Chul-Yong Park, Da Yang, Jun Yuan, Hao Wang, Jihong Choi, Esin Terzioglu, P. R. Chidi Chidambaram, Jerry Bao, Paul Ivan Penzes
Publikováno v:
2017 Symposium on VLSI Technology.
The industry's first 10nm low power high performance mobile SoC has been successfully ramped in production. Thanks to a thorough design-technology co-development, 10nm SoC is 16% faster, 37% smaller, and 30% lower power than its 14nm predecessor. The
Autor:
Junjing Bao, Ken Rim, S. C. Song, Jeffrey Junhao Xu, Giri Nallapati, Joseph Wang, Geoffrey Yeap, Mustafa Badaroglu, Praneeth Narayanasetti, Peijie Feng, John Jianhong Zhu, J. Fischer, Da Yang, B. Bucki
Publikováno v:
VLSI Circuits
We propose complete technology-design-system co-optimization method in which power, performance, thermal, area and cost metrics are all simultaneously optimized from transistor to mobile SOC system level. This novel method, Unified Technology Optimiz
Autor:
Joseph Wang, M. Vratonjic, M. Saint-Laurent, Niladri Narayan Mojumder, Ken Rim, S. C. Song, Ken Lin, John Jianhong Zhu, Geoffrey Yeap, P. Bassett, Jeffrey Junhao Xu
Publikováno v:
VLSIC
We present, for the first time, a holistic data-path driven transistor-interconnect co-optimization method, which systematically isolates the logic-gate and interconnect-wire dominated data-paths in block-level delay-bins (i.e., sub-binning of delay
Autor:
S. C. Song, Junjing Bao, B. Bucki, J. Fischer, Niladri Narayan Mojumder, Mustafa Badaroglu, Jeffrey Junhao Xu, Ken Rim, Da Yang, Vladimir Machkaoutsan, Praneeth Narayanasetti, Joseph Wang, John Jianhong Zhu, Geoffrey Yeap
Publikováno v:
VLSIC
We systematically investigated the impact of R and C scaling to 7nm node (N7) by accounting for FEOL and BEOL holistically. Speed-power performance of plainly scaled N7 turns out to be degraded compared to previous node. BEOL wire resistance (R wire
Publikováno v:
2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.
We present, for the first time, a holistic system-circuit-transistor co-optimization method, named “Critical Path Aware (CPA) transistor optimization”, through which we demonstrate power reduction of more than 20% in a state-of-the-art SoC design
Autor:
Nazmul Habib, Anda Mocuta, Xiaojun Yu, Susan K. Lichtensteiger, Ken Rim, Paul Chang, Kevin K. Dezfulian, Jeanne P. Bickford, Jie Deng, Sim Y. Loo
Publikováno v:
2012 Symposium on VLSI Technology (VLSIT).
A systematic method is proposed to address modeling challenges in accurate chip level leakage prediction, namely a precise total leakage width count method, a simple model to quantify leakage uplift caused by systematic across-chip variation, and a c
Publikováno v:
The Journal of Biochemistry. 114:126-131
An enzyme hydrolyzing flavine-adenine dinucleotide (FAD) to flavine mononucleotide (FMN) and adenosine monophosphate (AMP) was purified about 460-fold over the isolated lysosomal membranes with 9% recovery to apparent homogeneity, as determined from
Autor:
Ken Rim, Jonghae Kim, Jean-Olivier Plouchart, Mahender Kumar, Daeik Daniel Kim, Woo-Hyeong Lee, Choongyeun Cho
Publikováno v:
ISSCC
CMOS VCOs have been implemented for mm-wave applications [1–7], however, as the required channel bandwidth for these applications increases, wide-range VCO tuning is becoming more challenging. Even without taking into account the process variabilit