Zobrazeno 1 - 10
of 77
pro vyhledávání: '"Kei-Yong Khoo"'
Autor:
Yen-Chun Fang, Shao-Lun Huang, Chi-An Wu, Chung-Han Chou, Chih-Jen Hsu, WoeiTzy Jong, Kei-Yong Khoo
Publikováno v:
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).
Publikováno v:
Proceedings of the 39th International Conference on Computer-Aided Design.
Equivalence checking is the practical industrial solution to sign-off digital functionality for large-scale circuits. However, when design contains implicit and explicit X-values, the complexity of equivalence checking increases and heuristics used i
Publikováno v:
ICCAD
Using sampling patterns is always a powerful method to save efforts for the problems with large input space since it can quickly help identify cases' properties. The meaning behind these sampling results can be informative and useful, but these resul
Publikováno v:
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
Publikováno v:
ICCAD
Boolean Matching is significant to industry applications, such as library binding, synthesis, engineer change order, and hardware Trojan detection. Instead of basic Boolean matching, Non-exact Projective NPNP Boolean Matching allows to match two desi
Publikováno v:
2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
Publikováno v:
DAC
Sequential clock-gating can lead to easier equivalence checking problems, compared to the general sequential equivalence checking (SEC) problem. Modern sequential clock-gating techniques introduce control structures to disable unnecessary clocking. T
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 22:836-846
This paper is the first to combine the joint module-selection and retiming problem with the use of carry-save representation in the optimization of a synchronous circuit. To solve this problem efficiently, we first create a mixed-representation data-
Publikováno v:
2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
Efficiently solving numerous relevant circuit satisfiability (CircuitSAT) problems becomes a crucial industrial topic as the design scale expands. In this topic, we are especially interested in: how to select the best setting of the Boolean satisfiab
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 20:633-647
Advances of very large scale integration technologies present two challenges for routing problems: (1) the higher integration of transistors due to shrinking of featuring size and (2) the requirement for off-grid routing due to the variable-width var