Zobrazeno 1 - 10
of 29
pro vyhledávání: '"Keejong Kim"'
Publikováno v:
Journal of the Korean Society of International Agricultue. 32:320-326
Cabbage (Brassica oleraceae var. Capitata L.) is one of the most important leafy vegetables grown by smallholder farmers in Zimbabwe for food, nutrition, and income security. The study evaluated the adaptation of two Korean varieties/entries (‘K5
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7c2f1c2c176ef44063072a98a40e37e5
https://doi.org/10.12719/ksia.2020.32.4.320
https://doi.org/10.12719/ksia.2020.32.4.320
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 19:1429-1437
For ultra low power application, digital sub-threshold logic design has been explored. Extremely low power supply (VDD) of sub-threshold logic results in significant power reduction. However, it is difficult to convert signals from core logic to inpu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2bdf85bc9faf09de566d85dc677052c4
https://doi.org/10.1109/tvlsi.2010.2051240
https://doi.org/10.1109/tvlsi.2010.2051240
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18:270-280
Performance variability in digital integrated circuits can largely affect parametric yield and product reliability in ultra deep submicrometer technologies. As a result, variation resilience is becoming an essential design requirement for future tech
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5b4bbdbc72fc7466372dec5d674d0abf
https://doi.org/10.1109/tvlsi.2008.2010399
https://doi.org/10.1109/tvlsi.2008.2010399
Publikováno v:
Department of Electrical and Computer Engineering Faculty Publications
Low-power SRAM design is crucial since it takes a large fraction of total power and die area in high-performance processors. Reducing voltage swing of the bit-line is an effective way to save the power dissipation in write cycles. Voltage swing reduc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::60a3801eca01dc16703b5e0bc9882674
https://doi.org/10.1109/jssc.2007.914294
https://doi.org/10.1109/jssc.2007.914294
Publikováno v:
IEEE Journal of Solid-State Circuits. 42:2303-2313
We propose a novel Schmitt trigger (ST) based differential 10-transistor SRAM (static random access memory) bitcell suitable for subthreshold operation. The proposed Schmitt trigger based bitcell achieves 1.56 x higher read static noise margin (SNM)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b15589c07baf2129f23da0a609522a18
https://doi.org/10.1109/jssc.2007.897148
https://doi.org/10.1109/jssc.2007.897148
Publikováno v:
IEEE Journal of Solid-State Circuits. 42:1370-1382
In nanoscaled technologies, increased inter-die and intra-die variations in process parameters can result in large number of parametric failures in an SRAM array, thereby, degrading yield. In this paper, we propose a self-repairing SRAM to reduce par
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6135983b1c3eab8ad5756770356db1dc
https://doi.org/10.1109/jssc.2007.897161
https://doi.org/10.1109/jssc.2007.897161
Publikováno v:
DAC
In this work, we propose a Schmitt Trigger (ST) based differential sensing SRAM bitcell that can operate at ultra-low supply voltage. The proposed Schmitt Trigger SRAM cell addresses the fundamental conflicting design requirement of read versus write
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fabb79834daf994ec33a7a9e7d817441
https://doi.org/10.1145/1391469.1391498
https://doi.org/10.1145/1391469.1391498
Publikováno v:
ISLPED
We propose a new low-power SRAM using bit-line Charge Recycling (CR-SRAM) for the write operation. In the proposed write scheme, differential voltage swing of a bit-line is obtained by recycled charge from its adjacent bit-line capacitance. In order
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4601493fcbb28b61178e79b1e779fe42
https://doi.org/10.1145/1283780.1283819
https://doi.org/10.1145/1283780.1283819
Publikováno v:
ISLPED
We propose a novel Schmitt Trigger (ST) based fully differential 10 transistor SRAM (Static Random Access Memory) bitcell suitable for sub-threshold operation. The proposed Schmitt trigger based bitcell achieves 1.56X higher read static noise margin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f7694d0acc493c5b381b649edcbd8623
https://doi.org/10.1145/1283780.1283818
https://doi.org/10.1145/1283780.1283818
Publikováno v:
2007 44th ACM/IEEE Design Automation Conference.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0c710d28fd1f6b59e0e7c9316af4bd3b
https://doi.org/10.1109/dac.2007.375187
https://doi.org/10.1109/dac.2007.375187