Zobrazeno 1 - 10
of 67
pro vyhledávání: '"Kee Sup Kim"'
Autor:
Ming Zhang, Kee Sup Kim
Publikováno v:
IEEE Design & Test of Computers. 25:142-148
Capitalizing on the larger capacity of today's ICs, designers are using yesterday's chips as modules in today's chips. DFT methodologies, which usually work on a large, flat design, must begin to take this reuse into account. This article shows how t
Autor:
Sanjay J. Patel, N.J. Wang, Kee Sup Kim, N. Seifert, Subhasish Mitra, Naresh R. Shanbhag, Quan Shi, Tak M. Mak, Ming Zhang
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 14:1368-1378
This paper presents a built-in soft error resilience (BISER) technique for correcting radiation-induced soft errors in latches and flip-flops. The presented error-correcting latch and flip-flop designs are power efficient, introduce minimal speed pen
Autor:
Sung Joo Park, Nitish Natu, Woonghwan Ryu, Sang Min Lee, Kee Sup Kim, Byung-Hyun Lee, Madhavan Swaminathan
Publikováno v:
2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging and Systems.
Clock Distribution Networks (CDN) in three dimensional ICs face problems due to temperature and gradients observed across the die. The propagation delay of paths in the CDN varies and leads to mismatch in skew at the distribution points. This could p
Publikováno v:
Computer. 38:43-52
Transient errors caused by terrestrial radiation pose a major barrier to robust system design. A system's susceptibility to such errors increases in advanced technologies, making the incorporation of effective protection mechanisms into chip designs
Autor:
Subhasish Mitra, Kee Sup Kim
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 23:421-432
X-Compact is an X-tolerant test response compaction technique. It enables up to exponential reduction in the test response data volume and the number of pins required to collect test response from a chip. The compaction hardware requires negligible a
Publikováno v:
IEEE Design & Test of Computers. 20:8-16
Several factors influence production delay testing and corresponding DFT techniques: defect sources, design styles. ability to monitor process characteristics, test generation time. available test time, and tester memory. We present an overview of de
Autor:
Gunrae Kim, Nae-In Lee, Kyungsik Park, Miji Lee, Ming Zhang, Sangwoo Pae, Jinwoo Choi, Dong-Suk Shin, Jongwoo Park, Il-gon Kim, Jongsun Bae, Kee Sup Kim
Publikováno v:
2014 IEEE International Reliability Physics Symposium.
We report the experimental procedure and data that establishes the correlation between natural boron (B 10 ) concentration and thermal neutron soft error rate (SER) in an advanced 28nm high-k/metal gate (HK/MG) technology node. Thermal neutron induce
Autor:
Kyu-Myung Choi, Jong-Hoon Jung, Woojin Rim, Sunghyun Park, Jinsuk Jung, Sung-Bong Kim, Gyu-Hong Kim, Jae-Ho Park, Sanghoon Baek, Young-Keun Lee, Jin-Tae Kim, Sang-pil Sim, Jong Shik Yoon, Kee Sup Kim, Giyong Yang, Taejoong Song, Sang-Kyu Oh, Kang-Hyun Baek
Publikováno v:
ISSCC
With the explosive growth of battery-operated portable devices, the demand for low power and small size has been increasing for system-on-a-chip (SoC). The FinFET is considered as one of the most promising technologies for future low-power mobile app
Autor:
Byung-Hyun Lee, Sung Joo Park, Sang Min Lee, Nitish Natu, Kee Sup Kim, Woonghwan Ryu, Madhavan Swaminathan
Publikováno v:
2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems.
Three-dimensional Integrated Circuits provide a solution to overcome bottlenecks in performance and power management issues. However, the drawback arises in the form of increased thermal density that results in thermal gradients that affect signal in
Autor:
Jung Yun Choi, Bernd Becker, Kee Sup Kim, Kyung-Tae Do, Young Moon Kim, Hyung-Ock Kim, Matthias Sauer, Jun Seomun, Subhasish Mitra
Publikováno v:
CICC
Using 28nm test chips, we derive signatures for early-life failures (ELF) in both high-K/metal-gate transistors and ultra low-K inter-metal dielectrics. We also demonstrate that the derived ELF signatures can be successfully detected using a clock co