Zobrazeno 1 - 3
of 3
pro vyhledávání: '"Kazuhide Yoneya"'
Autor:
Siddhesh Darne, Teruo Takagiwa, Junya Matsuno, Yuki Shimizu, Naoya Tokiwa, Kei Shiraishi, Tetsuaki Utsumi, Hiroyuki Mizukoshi, Koji Hosono, Masatsugu Kojima, Junji Musha, Takuyo Kodama, Osamu Kobayashi, Masahiro Kano, Takeshi Hioka, Naoki Ookuma, Yuki Kuniyoshi, Takahiro Sugimoto, Ryoichi Tachibana, Hiroshi Sugawara, Hiroki Date, Kazuhide Yoneya, Srinivas Rajendra, Akira Arimizu, Yoshito Katano, Mitsuhiro Abe, Keiji Tsunoda, Masakazu Ehama, Toshifumi Hashimoto, Tianyu Tang, Tomofumi Fujimura, Ryo Fukuda, Jason Li, Hiroshi Maejima, Shintaro Hayashi, Akio Sugahara, Kei Akiyama, Koji Kato, Toru Miwa, Kensuke Yamamoto, Masahiro Yoshihara, Katsuaki Sakurai, Itaru Yamaguchi, Tsutomu Higuchi, Mizuki Kaneko, Jumpei Sato, Kazumasa Yamamoto, Yasuhiro Suematsu, Mitsuyuki Watanabe, Ryuji Yamashita, Venky Ramachandra, Kosuke Yanagidaira, Jiwang Lee, Kazuko Inuzuka, Hirotoshi Mori, Takatoshi Minamoto, Tomoharu Hashiguchi, Mitsuaki Honma, Juan Lee
Publikováno v:
ISSCC
This work demonstrates a novel 1Tb 3D Flash memory chip that has an area efficiency of 10.4Gb/mm2 in a 3b/cell technology. Using a circuit under array (CUA) design technique and over 170 word-line (WL) layers, the chip achieves 33% higher bit density
Autor:
Debasish Dwibedy, Sulagna Dey, Prashant Swarnkar, Patrick Hong, Mitsuyuki Watanabe, Koichiro Hayashi, Jiawei Tao, Chang Siau, Juan Lee, Kapil Verma, Jonathan Huynh, Subodh Taigor, William Mak, Takuya Ariki, Yoshihiko Kamata, Zameer Papasaheb, Hiroyuki Mizukoshi, Takuyo Kodama, Toru Miwa, Norihiro Kamae, Trung Pham, Naoki Ookuma, Ryuji Yamashita, Ching-Huang Lu, Meiling Wei, Tsutomu Higuchi, Hitoshi Miwa, Masahide Matsumoto, Rangarao Samineni, Farookh Moogat, Yuzuru Namai, Yingda Dong, Vivek Saraf, Shunichi Toyama, Muralikrishna Balaga, Aditya Pradhan, Hiroki Yabe, Minoru Yamashita, Sung-En Wang, Kazuhide Yoneya, Ying Yu, Samiksha Agarwal, Gopinath Balakrishnan, Thushara Xavier, Manabu Sakai, Xiaohua Zhang, Yuko Utsunomiya, Yosuke Kato, Sahil Deora, Shuo Chen, Yankang He, Sagar Magia, Akshay Petkar, Hardwell Chibvongodze, Swaroop Kulkarni, Shingo Zaitsu, Toshio Yamamura
Publikováno v:
ISSCC
High floating-gate (FG) to FG coupling and lithography limitations have been preventing 2D-NAND flash from further reduction in die size, (e.g., there is no ISSCC paper discussing a 3b/cell 2D-NAND after 2013 [1,2]). Alternatively, since high-density
Autor:
Norifumi Kajimura, H. Otake, F. Ito, Kazushige Kanda, Y. Okukawa, Teruhiko Kamei, Mitsuhiro Noguchi, M. Higashitani, M. Kojima, Masahiro Yoshihara, Kazuhide Yoneya, Frank Tsai, Masanobu Shirakawa, M. Itoh, Siu Lung Chan, Toshiki Hisada, Yosuke Kato, Takashi Taira, Eiichi Makino, Binh Quang Le, Dai Nakamura, G. Hemink, Toshio Yamamura, Alex Mak, Shinji Miyamoto, Raul-Adrian Cernea, Yoshinao Suzuki, Shigeo Ohshima, Susumu Fujimura, Koji Hosono, Toru Miwa, Yoshiaki Takeuchi, T. Maruyama, T. Arizono, Toshitake Yaegashi, Masaru Koyanagi, K. Ino
Publikováno v:
ISSCC
NAND flash memory use in digital still cameras and cellular phones is driving demand for larger-capacity storage. Moreover, NAND flash has the potential to replace HDDs. To achieve larger capacity while maintaining low cost per bit, technical improve