Interconnect enhancements for a high-speed PLD architecture.

Autor: Hutton, Michael, Chan, Vinson, Kazarian, Peter, Maruri, Victor, Ngai, Tony, Park, Jim, Patel, Rakesh, Pedersen, Bruce, Schleicher, Jay, Shumarayev, Sergey

Publikováno v: Proceedings of the 2002 ACM/SIGDA Tenth International Symposium: Field-programmable Gate Arrays; 2/24/2002, p3-10, 8p