Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Katsunori Seno"'
Autor:
Akira Yoshikaie, Ryo Ogawa, Teppei Imamura, Kenji Ohki, Katsunori Seno, Yusuke Ogawa, Kuniya Abe, Masahiro Takada, Yuki Mamishin, Akihito Yajima, Shunsuke Inagaki, Masahiro Ando, Susumu Seino
Publikováno v:
Optical Architectures for Displays and Sensing in Augmented, Virtual, and Mixed Reality (AR, VR, MR) IV.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d3f87ba2cabbd3260bbc76d8f84fff3c
https://doi.org/10.1117/12.2662885
https://doi.org/10.1117/12.2662885
Autor:
Katsunori Seno
Publikováno v:
Digital Design and Fabrication ISBN: 9781315222226
Digital Design and Fabrication
Digital Design and Fabrication
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3ed023955027fa75b8c56fc48f84117c
https://doi.org/10.1201/9780849386046-18
https://doi.org/10.1201/9780849386046-18
Autor:
Kazuo Kumano, Hirokazu Kawahara, Masakatsu Nakai, Satoshi Akui, Masayuki Shimura, Tetsuo Kondo, Takahiro Seki, Katsunori Seno, Tetsumasa Meguro, Akihiko Hashiguchi
Publikováno v:
IEEE Journal of Solid-State Circuits. 40:28-35
In this paper, a Dynamic Voltage and Frequency Management (DVFM) scheme introduced in a microprocessor for handheld devices with wideband embedded DRAM is reported. Our DVFM scheme reduces the power consumption effectively by cooperation of the auton
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7c70f85505dbe92cb323fa9f71c4eba8
https://doi.org/10.1109/jssc.2004.838021
https://doi.org/10.1109/jssc.2004.838021
Autor:
Katsunori Seno, Koji Aoyama, Akihiko Hashiguchi, Hiroshi Okuda, Kenichiro Nakamura, T. Yamazaki, Mitsuharu Ohki, H. Hanaki, Ichiro Kumata, Seiichiro Iwase, M. Aikawa, Mitsuo Soneda, Masuyoshi Kurokawa
Publikováno v:
1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.
A programmable DSP with linear-array architecture for real-time video processing, including video format conversion, has 4320 SIMD processor elements, has a peak processing rate of 5.4 GOPS, and can be applied to HDTV signals with its 75 MHz peak I/O
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cd937b7b1fa3be06a4353f01861f234b
https://doi.org/10.1109/isscc.1996.488594
https://doi.org/10.1109/isscc.1996.488594
Publikováno v:
1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing.
The continually increasing integration density of integrated circuits portrays important paradigm shifts in next-generation designs, especially in the direction of systems-on-a-chip. Hybrid architectures mixing a variety of computational models are b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4ba11294a3443573dc957dfcf0bb7719
https://doi.org/10.1109/sips.1997.625684
https://doi.org/10.1109/sips.1997.625684
Autor:
H. Yoshikawa, Mitsuo Soneda, Mitsuharu Ohki, Katsunori Seno, Y. Fukuzawa, M. Aikawa, E. Iwata, Seiichiro Iwase, K. Nishibori, T. Yamazaki, H. Hanaki, Y. Kondo, Ichiro Kumata, K. Hasegawa, H. Takamuki, Hiroshi Okuda, T. Nagai
Publikováno v:
1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.
In multimedia applications, various video encoding/decoding standards such as MPEG2, MPEG1 and emerging algorithms call for a DSP solution of the extremely computation-intensive tasks. Several DSPs have been developed based on intensive pipeline proc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::de1eae8e4b6dc865536cc82bfe760493
https://doi.org/10.1109/isscc.1997.585378
https://doi.org/10.1109/isscc.1997.585378
Publikováno v:
VLSI Signal Processing, VIII.
We developed a soft macro cell generator which generates discrete cosine transform (DCT) macro cells for various video compression requirements. Because of the proposed fast algorithm, hardware implementation, and customized flip flop cells, a genera
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9257357261d4e517b500e02deb5d9ec6
https://doi.org/10.1109/vlsisp.1995.527515
https://doi.org/10.1109/vlsisp.1995.527515
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783540643593
IPPS/SPDP Workshops
IPPS/SPDP Workshops
Programmability is an important capability that provides flexible computing devices, but it incurs significant performance and power penalties. We have proposed an architecture that relies on dynamic reconfiguration of hardware resources to implement
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::62d94f04614764505b8b3ec8130af857
https://doi.org/10.1007/3-540-64359-1_673
https://doi.org/10.1007/3-540-64359-1_673
Conference
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Conference
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