Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Katsuhiko Degawa"'
Publikováno v:
2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW).
Propagation delay variation of the threshold detection comparator in current-day level-crossing ADCs is a fundamental impediment to their performance. This paper reviews why commonly used threshold detection comparators can be inappropriate to detect
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0d1ce78ae5328e961105004e2ba2c3f8
https://doi.org/10.1109/ims3tw.2016.7524233
https://doi.org/10.1109/ims3tw.2016.7524233
Autor:
Mani Soma, Kouichiro Uekusa, Katsuhiko Degawa, Takahiro Yamaguchi, Masahiro Ishida, Masayuki Kawabata
Publikováno v:
ITC
This paper proposes a new method for directly measuring alias-free aperture jitter in an ADC output. Both the average ENOB and the worst-case ENOB due to aperture jitter are also measured after the elimination of the aliasing noise. Because it adds o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::75e5332aaaaca65a00343dee5c6c1744
https://doi.org/10.1109/test.2015.7342384
https://doi.org/10.1109/test.2015.7342384
Autor:
Hiroshi Nakashima, Hiroshi Inokawa, Koji Sumitomo, Takafumi Aoki, Touichiro Goto, Kazuaki Furukawa, Katsuhiko Degawa, Keiichi Torimitsu
Publikováno v:
Japanese Journal of Applied Physics. 45:4285-4289
We report the electrical characteristics of gold nanogap devices modified by conjugated molecules with thiol endgroups. Gold nanogap electrodes with a nominal gap distance of between 1–2 nm were fabricated by double oblique deposition from opposite
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::feecd78e42b87bae837b1baf2cb5cc30
https://doi.org/10.1143/jjap.45.4285
https://doi.org/10.1143/jjap.45.4285
Autor:
Mani Soma, Katsuhiko Degawa, Kunihiro Asada, Takafumi Aoki, Mohamed Abbas, Satoshi Komatsu, Takahiro Yamaguchi, Yasuo Furukawa
Publikováno v:
ITC
This paper introduces a new Level-Crossing ADC (LCADC) architecture which employs the novel use of a clocked comparator. The proposed LCADC can measure a timing noise spectrum with wide dynamic range and wide frequency range. An extension of the unde
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::37489c504619da050bf561ba31103013
https://doi.org/10.1109/test.2011.6139177
https://doi.org/10.1109/test.2011.6139177
Autor:
Mani Soma, Mohamed Abbas, Takafumi Aoki, Kunihiro Asada, Yasuo Furukawa, Takahiro Yamaguchi, Satoshi Komatsu, Katsuhiko Degawa
Publikováno v:
ISCAS
This paper presents an improved design for a Level-Crossing ADC (LCADC) that incorporates both an equivalent-time method and a clocked comparator. The LCADC is experimentally validated using a 65 nm clocked comparator.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::37d9d757dd0493b3f329543914f86be8
https://doi.org/10.1109/iscas.2011.5938119
https://doi.org/10.1109/iscas.2011.5938119
Autor:
Takafumi Aoki, Katsuhiko Degawa, Takayuki Akita, Takahiro Yamaguchi, Kazuyuki Miyazawa, Albert Tumewu
Publikováno v:
ICASSP
This paper proposes a novel method for aligning two signals using the information contained in the overlapped band. In particular the proposed method aligns two signals by compensating both time-delay and phase-offset in the second signal using the e
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4fe786faf1494b81f00ebed5dea3c786
https://doi.org/10.1109/icassp.2009.4960339
https://doi.org/10.1109/icassp.2009.4960339
Publikováno v:
ISMVL
This paper proposes a high-level design method of multiple-valued arithmetic circuits. The proposed method uses a cell-based approach with a dedicated hardware description language called ARITH. By using ARITH, we can describe and verify any binary/m
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c489eaadbac96decd2b18d2a9afac7b0
https://doi.org/10.1109/ismvl.2008.39
https://doi.org/10.1109/ismvl.2008.39
Publikováno v:
ISMVL
This paper presents a novel approach to designing multiple-valued arithmetic circuits based on a unified representation of addition algorithms called Counter Tree Diagrams (CTDs). By using CTDs, we can derive possible variations of addition algorithm
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::35cd898061314deee6cd33c1477519dc
https://doi.org/10.1109/ismvl.2007.6
https://doi.org/10.1109/ismvl.2007.6
Autor:
Hiroshi Inokawa, Tatsuo Higuchi, Yasuo Takahashi, Katsuhiko Degawa, Takafumi Aoki, Katsuhiko Nishiguchi
Publikováno v:
ISMVL
This paper presents a circuit design of a Ternary Content-Addressable Memory (TCAM) using Single- Electron Transistors (SETs). The proposed TCAM cell employs a SET-based ternary memory and a dual-gate SET for ternary data matching. The multi-level fu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6507a071dc01c86a1e0af0d6ed8ee3b4
https://doi.org/10.1109/ismvl.2006.6
https://doi.org/10.1109/ismvl.2006.6
Publikováno v:
ISMVL
Scopus-Elsevier
Scopus-Elsevier
This paper presents a circuit design of a two-bit-per-cell content-addressable memory (CAM) using single-electron transistors (SETs). The key ideas of the proposed CAM architecture are (i) four-level data storage function implementing by a SET-based
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a74325792023aea1efb431f530ffb74b
https://doi.org/10.1109/ismvl.2005.6
https://doi.org/10.1109/ismvl.2005.6