Zobrazeno 1 - 10
of 27
pro vyhledávání: '"Kanji Hirabayashi"'
Autor:
Kanji Hirabayashi
Publikováno v:
Journal of Electronic Testing. 4:131-135
This article proposes a 7-valued logic appropriate for test generation and fault simulation, in the area of robust tests for gate delay faults, and a straightforward simulation strategy for sequential circuits. It is shown that a purely qualitative l
Autor:
Kanji Hirabayashi
Publikováno v:
Journal of Electronic Testing. 2:205-208
This article presents a new approach to implementing self-checking circuits in CMOS technology. Implementations are made self-checking with respect to a single line stuck-at 0/1 fault. It is assumed that stuck faults at a common gate of neighboring P
Publikováno v:
Journal of Electronic Testing. 1:235-238
Autor:
Kanji Hirabayashi
Publikováno v:
Journal of Electronic Testing: Theory and Applications (JETTA). 8:215-217
A 7-valued logic appropriate for hazard simulation of sequential circuits is investigated in this letter. The 5-valued system of Lin and Reddy is extended to discriminate transitions with and without hazard. We assume that hazards are damped in the f
Autor:
Kanji Hirabayashi
Publikováno v:
Applied Physics Letters. 68:1978-1980
In this letter, we calculate the interface state energy in nitrogen incorporated gate oxides by using a one‐dimensional two‐band model and Penn’s model connecting the refractive index with typical band gap. We estimate the number of dangling bo
Autor:
Kanji Hirabayashi
Publikováno v:
Journal of Electronic Testing. 17:543-544
In this letter we report the formal verification of microprocessors. After we describe algebraically a bit-sliced microprocessor at both function and logic levels, we apply the symbolic manipulation of Mathematica.
Autor:
Kanji Hirabayashi
Publikováno v:
Journal of Electronic Testing. 13:321-322
In this letter we report the formal verification of encryption and decryption circuits. After we describe algebraically a simple modular arithmetic circuit at both function and logic levels, we apply the symbolic manipulation of Mathematica.
Publikováno v:
Integration. 3:3-12
This paper describes an efficient test generation method based on activation and defect-drive using random patterns. The activation process generates patterns to control any circuit node to 0 and 1. After the activation process, the defect-drive prop
Publikováno v:
Psychiatry and Clinical Neurosciences. 33:81-96
Summary Clinical and neuropathological findings of a 63-year-old male and a 25-year-old female with Down's syndrome are presented. Neuropathological examination of the older patient revealed intense features of Alzheimer's disease or senile dementia,
Autor:
Kanji Hirabayashi
Publikováno v:
Journal of the Physical Society of Japan. 22:590-597
Stresses around an edge dislocation near a free surface are calculated using two kinds of elastic representations (Volterra dislocations): One is a ring deformed by removal of a slice of uniform thickness and the other is a ring deformed by slip. Onl