Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Kanan Bala Ray"'
Autor:
B. S. Patro, Kanan Bala Ray
Publikováno v:
2018 International Conference on Applied Electromagnetics, Signal Processing and Communication (AESPC).
In this work, Static Random Access Memory (SRAM) is designed on 0.18 micron by using CADENCE virtuoso tools. It focuses on the power consumption and leakage power improvement since SRAM has high leakage power consumption. Leakage power and performanc
Publikováno v:
2017 Devices for Integrated Circuit (DevIC).
This paper presents the design of portable Biopotential processor for Electrocardiogram (ECG), Electromyogram (EMG), Electroencephalogram (EEG), Electrooculogram (EOG) signals monitoring device. This processor offers highresolution biomedical signals
Publikováno v:
Indian Journal of Science and Technology. 9
Objective: Leakage power is the major concern of circuit designers in nano meter technology era. The objective of this work is to design a low leakage power floating gate MOS static random access memory. Methods/Statistical Analysis: The proposed des
Publikováno v:
Indonesian Journal of Electrical Engineering and Computer Science. 4:333
In this paper floating gate MOS (FGMOS) along with sleep transistor technique and leakage control transistor (LECTOR) technique has been used to design low power SRAM cell. Detailed investigation on operation, analysis and result comparison of conven