Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Kamran Rahmani"'
Autor:
Kamran Rahmani, Majid Alitavoli
Publikováno v:
مکانیک هوافضا, Vol 20, Iss 1, Pp 77-88 (2024)
Shot peening is a cold working process that is used to increase the fatigue life of metal parts by creating compressive residual stress on their surface. The experimental investigation of the parameters of this process is very difficult and expensive
Externí odkaz:
https://doaj.org/article/a7e29a7314a6493d8771f43bf1075b34
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25:570-580
A key problem in postsilicon validation is to identify a small set of traceable signals that are effective for debug during silicon execution. Structural analysis used by traditional signal selection techniques leads to a poor restoration quality. In
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b527c65d4ad79c7e08faa0f11789fcaf
https://doi.org/10.1109/tvlsi.2016.2593902
https://doi.org/10.1109/tvlsi.2016.2593902
Publikováno v:
Post-Silicon Validation and Debug ISBN: 9783319981154
A key constraint in post-silicon validation and debug is limited observability of internal signals. Knowledge of only primary outputs can lead to an observability of a few internal signals. The most widely used on-chip testing infrastructure is scan
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0e4591a1a2abc9e852c49ca7682e17fe
https://doi.org/10.1007/978-3-319-98116-1_6
https://doi.org/10.1007/978-3-319-98116-1_6
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24:313-323
Post-silicon validation is a critical part of integrated circuit design methodology. The primary objective is to detect and eliminate the bugs that have escaped pre-silicon validation phase. One of the key challenges in post-silicon validation is the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6fb772cf8e5ef20d64b6a86b14945d9b
https://doi.org/10.1109/tvlsi.2015.2396083
https://doi.org/10.1109/tvlsi.2015.2396083
Publikováno v:
Sustainable Computing: Informatics and Systems. 2:71-80
Optimization techniques are widely used in embedded systems design to improve overall area, performance and energy requirements. Dynamic cache reconfiguration is very effective to reduce energy consumption of cache subsystems which accounts for about
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::34eaba6ddebc38d644a4c20c2c7125bc
https://doi.org/10.1016/j.suscom.2012.01.003
https://doi.org/10.1016/j.suscom.2012.01.003
Publikováno v:
VLSI Design
Estimation of peak power consumption is an essential task in order to design reliable systems. Optimistic design choices can make the circuit unreliable and vulnerable to power attacks, whereas pessimistic design can lead to unacceptable design overh
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d235e8a27d6057f35601bf0d4aee989
https://doi.org/10.1109/vlsid.2015.68
https://doi.org/10.1109/vlsid.2015.68
Publikováno v:
ISQED
A key problem in post-silicon validation is to identify a small set of traceable signals that are effective for debug during silicon execution. Most signal selection techniques rely on a metric based on circuit structure. Simulation-based signal sele
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7633005323d0904314de7ad42740fe55
https://doi.org/10.1109/isqed.2014.6783318
https://doi.org/10.1109/isqed.2014.6783318
Publikováno v:
ICCD
A key problem in post-silicon validation is to identify a small set of traceable signals that are effective for debug during silicon execution. Structural analysis used by traditional signal selection techniques leads to poor restoration quality. In
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::db081b31aac93f4e0e9e11dfad301a59
https://doi.org/10.1109/iccd.2013.6657069
https://doi.org/10.1109/iccd.2013.6657069
Autor:
Prabhat Mishra, Kamran Rahmani
Publikováno v:
IEEE Transactions on Emerging Topics in Computing. :1-1
A key challenge of post-silicon validation methodology is to select a limited number of trace signals that are effective during post-silicon debug. Structural analysis used by traditional signal selection techniques are fast but lead to poor restorat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ffd0b822ff64013b5826abb6cfcc846e
https://doi.org/10.1109/tetc.2017.2787610
https://doi.org/10.1109/tetc.2017.2787610
Autor:
Prabhat Mishra, Kamran Rahmani
Publikováno v:
VLSI Design
Post-silicon validation is a critical part of integrated circuit design methodology. The primary objective is to detect and eliminate the bugs that has escaped pre-silicon validation phase. One of the key challenges in post-silicon validation is the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::df5241ac9ac15a5e1c12f7ab43266906
https://doi.org/10.1109/vlsid.2013.206
https://doi.org/10.1109/vlsid.2013.206