Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Kamel Beznia"'
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, In press, ⟨10.1109/TCAD.2019.2907923⟩
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, In press, ⟨10.1109/TCAD.2019.2907923⟩
Analog/RF built-in test (BIT) techniques are essential for reducing the very high costs of specification-based tests and for high-safety applications. The adoption of a BIT technique needs to be decided at the design stage, and this can be facilitate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7fa6f221448fdf29218b9e07e3ffde02
https://hal.archives-ouvertes.fr/hal-02089332/file/tcad_2019_final.pdf
https://hal.archives-ouvertes.fr/hal-02089332/file/tcad_2019_final.pdf
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems, Association for Computing Machinery, 2015, 20 (2), pp.Article No. 31. ⟨10.1145/2699837⟩
ACM Transactions on Design Automation of Electronic Systems, Association for Computing Machinery, 2015, 20 (2), pp.Article No. 31. 〈10.1145/2699837〉
ACM Transactions on Design Automation of Electronic Systems, Association for Computing Machinery, 2015, 20 (2), pp.Article No. 31. ⟨10.1145/2699837⟩
ACM Transactions on Design Automation of Electronic Systems, Association for Computing Machinery, 2015, 20 (2), pp.Article No. 31. 〈10.1145/2699837〉
International audience; Testing analog integrated circuits is expensive in terms of both test equipment and time. To reduce the cost, Design-For-Test techniques (DFT) such as Built-In Self-Test (BIST) have been developed. For a given Circuit Under Te
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2e9233c4b028b7c7d233c95f9a697f9b
https://hal.archives-ouvertes.fr/hal-01142592
https://hal.archives-ouvertes.fr/hal-01142592
Publikováno v:
IDT
The analog/RF functional test which is based on specification circuit testing is very costly due to lengthy test times and highly sophisticated test equipment. Alternative test measures, extracted by means of Built-in Self Test (BIST) techniques, are
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3ed07b817db2ebfc1a815feccace8068
https://doi.org/10.1109/idt.2014.7038587
https://doi.org/10.1109/idt.2014.7038587
Publikováno v:
IEEE International Conference on Design & Technology of Integrated Systems in nanoscale era (DTIS'13)
IEEE International Conference on Design & Technology of Integrated Systems in nanoscale era (DTIS'13), Mar 2013, Abu Dhabi, United Arab Emirates
Proc. of 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Mar 2013, Abu Dhabi, United Arab Emirates. pp.29
DTIS
IEEE International Conference on Design & Technology of Integrated Systems in nanoscale era (DTIS'13), Mar 2013, Abu Dhabi, United Arab Emirates
Proc. of 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Mar 2013, Abu Dhabi, United Arab Emirates. pp.29
DTIS
ISBN 978-1-4673-6038-8; International audience; Analog Built-In Test (BIT) techniques should be evaluated at the design stage, before the real production, by estimating the analog test metrics, namely Test Escapes (TE) and Yield Loss (YL). Due to the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d2122256e83bc704fff80305ee8c428d
https://hal.univ-brest.fr/hal-00765157
https://hal.univ-brest.fr/hal-00765157
Publikováno v:
ICECS
Specification-based testing of analog/RF circuits is very costly due to lengthy test times and highly sophisticated test equipment. Alternative test measures, extracted by means of Built-In Test (BIT) techniques, are a promising approach to replace s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1f66d85788dee3b26b42ac112acdeb1a
https://doi.org/10.1109/icecs.2012.6463748
https://doi.org/10.1109/icecs.2012.6463748
Publikováno v:
IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW'11)
IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW'11), May 2011, 000000, United States
IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW'11), May 2011, 000000, United States
The evaluation of parametric test metrics for analog/RF test techniques requires an accurate multivariate statistical model of output parameters of the device under test, namely performances and test measurements. In this paper, we will use Copulas t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ab8ea5242dbb2504d9f0ac4fe0834ef2
https://doi.org/10.1109/ims3tw.2011.19
https://doi.org/10.1109/ims3tw.2011.19