Zobrazeno 1 - 10
of 50
pro vyhledávání: '"Kam-Leung Lee"'
Autor:
Lee Choonghyun, Eduard A. Cartier, John Bruley, Takashi Ando, Pouya Hashemi, Vijay Narayanan, Kam-Leung Lee
Publikováno v:
2017 IEEE International Electron Devices Meeting (IEDM).
Strained-SiGe, with high-Ge-content, has recently drawn significant attention as an alternate p-channel option for advance FinFETs. Among various technological challenges, gate stack is so critical to enable high-performance FETs. In this paper, key
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7bbc11a8bd716bacdaee490a196d153f
https://doi.org/10.1109/iedm.2017.8268510
https://doi.org/10.1109/iedm.2017.8268510
Autor:
Vijay Narayanan, Kam-Leung Lee, Pouya Hashemi, Takashi Ando, John A. Ott, Sebastian Engelmann, Renee T. Mo, Siyuranga O. Koswatta, John Bruley, Karthik Balakrishnan, Effendi Leobandung, Kevin K. Chan
Publikováno v:
2017 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).
FinFETs with strained-SiGe channel have recently drawn significant attention due to their built in uniaxial strain, higher mobility and better reliability over conventional Si FETs. Research on pure Ge has been the major focus of many institutes over
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cd3fd03c0ec14fa74789a5cbbb75dd86
https://doi.org/10.1109/vlsi-tsa.2017.7942468
https://doi.org/10.1109/vlsi-tsa.2017.7942468
Autor:
Renee T. Mo, Sebastian Engelmann, Pouya Hashemi, Effendi Leobandung, Kam-Leung Lee, Karthik Balakrishnan, Takashi Ando, Dae-Gyu Park, John A. Ott, Vijay Narayanan, Syuranga Koswatta
Publikováno v:
2016 IEEE Symposium on VLSI Technology.
We demonstrate high-performance (HP) High-Ge-Content (HGC) SiGe pMOS FinFETs with scaled EOT and improved junction. For the first time, SiGe FinFET EOT scaling down to ∼7A has been achieved. In addition, improved junction and series resistance has
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1fa8581901e4b7bac41009e8d9a485f0
https://doi.org/10.1109/vlsit.2016.7573370
https://doi.org/10.1109/vlsit.2016.7573370
Autor:
Anda Mocuta, Min Yang, Keith A. Jenkins, Raquel T. Anderson, Paul Ronsheim, An L. Steegen, Jack O. Chu, Meikei Ieong, Byoung Hun Lee, V. Mazzeo, S. Christansen, K.K. Chan, H. Chen, P. Oldiges, T. Kanarsky, Kam-Leung Lee, S.J. Koester, Kern Rim, John A. Ott, Hon-Sum Philip Wong, Patricia M. Mooney, F. Cardone, Huilong Zhu, Ronnen Andrew Roy, Diane C. Boyd, Dan Mocuta
Publikováno v:
Solid-State Electronics. 47:1133-1139
Strain-induced enhancement of current drive is a promising way to extend the advancement of CMOS performance. Fabrication of strained Si MOSFET has been demonstrated with key elements of modern day’s CMOS technology. Significant mobility and curren
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d27ced5d6d327ae962a6f6035aa37d11
https://doi.org/10.1016/s0038-1101(03)00041-8
https://doi.org/10.1016/s0038-1101(03)00041-8
Autor:
Dae-Gyu Park, Zhen Zhang, Vijay Narayanan, Ying Zhang, John A. Ott, Christopher P. D'Emic, M. Guillorn, Christian Lavoie, Martin M. Frank, Jin Cai, Wilfried Haensch, Marwan H. Khater, Chang Hwan Choi, D. Klaus, Bin Yang, Qingyun Yang, Yu Zhu, Q.C. Ouyang, Kam-Leung Lee
Publikováno v:
IEEE Electron Device Letters. 31:275-277
Schottky source/drain (S/D) MOSFETs hold the promise for low series resistance and extremely abrupt junctions, providing a path for device scaling in conjunction with a low Schottky barrier height (SBH). A S/D junction SBH approaching zero is also ne
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4f647a0af862db53ad3c499214111304
https://doi.org/10.1109/led.2010.2040133
https://doi.org/10.1109/led.2010.2040133
Publikováno v:
Microelectronic Engineering. 35:33-36
Nearly damage free etching of a high mobility Si SiGe heterostructure is obtained by using very low power reactive ion etching and precise end-point detection. Conductance versus wire width plots of 0.08 μm to 1 μm wide Si SiGe quantum well wires s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::23fe02cd16eb7f5609020d7f416e9a3d
https://doi.org/10.1016/s0167-9317(96)00131-1
https://doi.org/10.1016/s0167-9317(96)00131-1
Publikováno v:
Physical Review B. 54:10604-10608
The electronic properties of Si/${\mathrm{Si}}_{0.7}$${\mathrm{Ge}}_{0.3}$ quantum-well wires fabricated by reactive ion etching are investigated. The width of the nonconducting layer produced by the dry-etch damage and surface depletion is determine
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a49d6c707deddf1cad7b7d0138312efa
https://doi.org/10.1103/physrevb.54.10604
https://doi.org/10.1103/physrevb.54.10604
Publikováno v:
Microelectronic Engineering. 30:45-48
In this paper first results on electron beam lithography with a microcolumn are presented. Our miniaturized e-beam writer is designed to explore the energy range below 1 keV. This range is attractive because the mean free path of the electrons has a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3ea8d1f4d6ccecdbbec1c7e061d583d2
https://doi.org/10.1016/0167-9317(95)00191-3
https://doi.org/10.1016/0167-9317(95)00191-3
Self-Aligned n-Channel Germanium MOSFETs With a Thin Ge Oxynitride Gate Dielectric and Tungsten Gate
Autor:
Kathryn W. Guarini, Meikei Ieong, I. Babich, Wilfried Haensch, Kam-Leung Lee, Hon-Sum Philip Wong, P. Kozlowski, Huiling Shang, E. Sikorski, Christopher P. D'Emic
Publikováno v:
IEEE Electron Device Letters. 25:135-137
In this letter, we report self-aligned n-channel germanium (Ge) MOSFETs with a thin Ge oxynitride gate dielectric and tungsten gate electrode. Excellent off-state current is achieved through the reduction of junction leakage. For the first time, we h
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::44f8c350ac31dd0283f5e50302237d80
https://doi.org/10.1109/led.2003.823060
https://doi.org/10.1109/led.2003.823060
Publikováno v:
Microelectronic Engineering. 27:79-82
A sub-micron trenching technique has been developed to fabricate Aharonov-Bohm ring structures in a high mobility Si/Si"0"."7Ge"0"."3 modulation doped heterostructure. Scanning electron-beam lithography is used to expose the area defining the ring co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9b8747a91bc0fac2f87e4684f0df9a1a
https://doi.org/10.1016/0167-9317(94)00060-8
https://doi.org/10.1016/0167-9317(94)00060-8