Zobrazeno 1 - 10
of 820
pro vyhledávání: '"Kahng, Andrew"'
Autor:
Kahng, Andrew B., Wang, Zhiang
Global placement is a fundamental step in VLSI physical design. The wide use of 2D processing element (PE) arrays in machine learning accelerators poses new challenges of scalability and Quality of Results (QoR) for state-of-the-art academic global p
Externí odkaz:
http://arxiv.org/abs/2404.13049
Recent years have witnessed rapid advances in the use of neural networks to solve combinatorial optimization problems. Nevertheless, designing the "right" neural model that can effectively handle a given optimization problem can be challenging, and o
Externí odkaz:
http://arxiv.org/abs/2312.10589
Autor:
Esmaeilzadeh, Hadi, Ghodrati, Soroush, Kahng, Andrew B., Kim, Joon Kyung, Kinzer, Sean, Kundu, Sayak, Mahapatra, Rohan, Manasi, Susmita Dey, Sapatnekar, Sachin, Wang, Zhiang, Zeng, Ziqing
Parameterizable machine learning (ML) accelerators are the product of recent breakthroughs in ML. To fully enable their design space exploration (DSE), we propose a physical-design-driven, learning-based prediction framework for hardware-accelerated
Externí odkaz:
http://arxiv.org/abs/2308.12120
Autor:
Esmaeilzadeh, Hadi, Ghodrati, Soroush, Kahng, Andrew B., Kinzer, Sean, Manasi, Susmita Dey, Sapatnekar, Sachin S., Wang, Zhiang
Today's performance analysis frameworks for deep learning accelerators suffer from two significant limitations. First, although modern convolutional neural network (CNNs) consist of many types of layers other than convolution, especially during train
Externí odkaz:
http://arxiv.org/abs/2306.16767
Due to the unavailability of routing information in design stages prior to detailed routing (DR), the tasks of timing prediction and optimization pose major challenges. Inaccurate timing prediction wastes design effort, hurts circuit performance, and
Externí odkaz:
http://arxiv.org/abs/2305.06917
State-of-the-art hypergraph partitioners follow the multilevel paradigm that constructs multiple levels of progressively coarser hypergraphs that are used to drive cut refinement on each level of the hierarchy. Multilevel partitioners are subject to
Externí odkaz:
http://arxiv.org/abs/2305.06167
Autor:
Choi, Suhyeong, Jung, Jinwook, Kahng, Andrew B., Kim, Minsoo, Park, Chul-Hong, Pramanik, Bodhisatta, Yoon, Dooseok
We propose a systematic framework to conduct design-technology pathfinding for PPAC in advanced nodes. Our goal is to provide configurable, scalable generation of process design kit (PDK) and standard-cell library, spanning key scaling boosters (back
Externí odkaz:
http://arxiv.org/abs/2304.13215
In a typical RTL to GDSII flow, floorplanning or macro placement is a critical step in achieving decent quality of results (QoR). Moreover, in today's physical synthesis flows (e.g., Synopsys Fusion Compiler or Cadence Genus iSpatial), a floorplan .d
Externí odkaz:
http://arxiv.org/abs/2304.11761
We provide open, transparent implementation and assessment of Google Brain's deep reinforcement learning approach to macro placement and its Circuit Training (CT) implementation in GitHub. We implement in open source key "blackbox" elements of CT, an
Externí odkaz:
http://arxiv.org/abs/2302.11014
Akademický článek
Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.
K zobrazení výsledku je třeba se přihlásit.