Zobrazeno 1 - 10
of 19
pro vyhledávání: '"Ka-Un Chan"'
Autor:
Nagarajan Mahalingam, Hang Liu, Yisheng Wang, Kiat Seng Yeo, Chien-I Chou, Hung-Yu Tsai, Kun-Hsun Liao, Wen-Shan Wang, Ka-Un Chan, Ying-Hsi Lin
Publikováno v:
IEEE Microwave and Wireless Components Letters. 32:744-747
Autor:
Nagarajan Mahalingam, Hang Liu, Yisheng Wang, Kiat Seng Yeo, Chien-I Chou, Hung-Yu Tsai, Kun-Hsun Liao, Wen-Shan Wang, Ka-Un Chan, Ying-Hsi Lin
Publikováno v:
2022 IEEE/MTT-S International Microwave Symposium - IMS 2022.
Autor:
Ka-Un Chan, Chen Chih-Lung, Yang Yu-Che, Han-Chang Kang, Shen-Iuan Liu, Ying-Hsi Lin, Lu Yong-Ru
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 68:873-877
A sub-sampling phase-locked loop (SSPLL) with loop bandwidth calibration is presented. By using a sub-sampling phase detector with gain calibration and a pulse width control circuit, the loop bandwidth deviation of the SSPLL can be reduced. This SSPL
Autor:
Yen Hsiao-Tsung, Luo Cheng-Wei, Ta-Hsun Yeh, Po-Chih Wang, Chih-Wei Lai, Yuh-Sheng Jean, Ka-Un Chan, Chih-Yu Tsai, Ying-Hsi Lin
Publikováno v:
2016 IEEE International Symposium on Electromagnetic Compatibility (EMC).
This paper represents a layout solution to reduce the on-chip couplings in between two BALUNs, which is implemented by UMC 28iim CMOS process. In advanced CMOS technology and circuit application applied for higher frequency, couplings are always an i
Autor:
Ka-Un Chan, Chao-Hua Lu, S.-C. Yen, Che-Sheng Hu, Ying-Hsi Lin, Chao-Cheng Lee, Jiun-Zen Huang, Ming-Chong Huang, Wen-Shan Wang, Yung-Ming Chiu, Tzung-Ming Chen, Chun-Cheng Wang, Ying-Yao Lin, Bin-I Chang
Publikováno v:
IEEE Journal of Solid-State Circuits. 42:983-991
A low-power fullband 802.11a/b/g WLAN transceiver in 0.15-mum CMOS technology is described. The zero-IF transceiver achieves a receiver noise figure of 4.4/4 dB for the 2.4-GHz/5-GHz bands, respectively. The corresponding sensitivity at 54-Mb/s opera
Autor:
Chih-Yu Tsai, Chiao-Ling Chang, Chin-Lung Li, Han-Jung Shih, Meng-Hsun Tsai, Chia-Jun Chang, Po-Chih Wang, Wen-Shan Wang, Ka-Un Chan, Ying-Hsi Lin
Publikováno v:
2010 IEEE Radio Frequency Integrated Circuits Symposium.
A 2.4/5GHz Fully-Integrated Transceiver is implemented in 65nm CMOS technology. To alleviate the cost of external front-end components, the G-mode RF transmit/receive (T/R) switch and a power-efficient linear CMOS PA are fully integrated on-chip. On
Autor:
Kai-Yi Huang, R. Kuan, Han-Jung Shih, Chin-Lung Li, Po-Ching Lin, Shih-Min Lin, Chih-Kai Chien, Yi-Chang Shih, Wen-Shan Wang, Chao-Hua Lu, Yuh-Sheng Jean, Ming-Chung Huang, Tsung-Ming Chen, Yi-Jay Lin, Yung-Ming Chiu, Hong-Ta Hsu, Po-Yu Chen, Ying-His Lin, Ka-Un Chan
Publikováno v:
2008 IEEE Radio Frequency Integrated Circuits Symposium.
A low-power transceiver for 802.11n in 65 nm CMOS technology is presented. It supports 2times2 MIMO to satisfy the requirement of the draft 802.11n standard. In receiver chain it shows 5.3 dB low noise figure. In transmit chain an on-chip PA driver d
Autor:
Chao-Cheng Lee, Chun-Cheng Wang, Po-Chih Wang, Yung-Ming Chiu, Chia-Jun Chang, Ka-Un Chan, Yi-Ming Chang, Shih-Min Lin, Chao-Hua Lu, Chih-Pao Lin, Ying-His Lin, Chien-Yu Chen, Pei-Ju Chiu, Wei-Ming Chiu, Kai-Te Chen
Publikováno v:
2008 IEEE Radio Frequency Integrated Circuits Symposium.
A 2.4 GHz fully-integrated MISO transceiver consisting of two receivers and one transmitter is implemented in 0.18 mum CMOS technology. To alleviate the cost of external front-end components, the RF transmit/receive (T/R) switch and a power-efficient
Autor:
Ming-Chong Huang, Po-Chih Wang, Chia-Jun Chang, Kai-Te Chen, Chun-Cheng Wang, Ying-His Lin, Chao-Hua Lu, Chao-Cheng Lee, Pei-Ju Chiu, Yi-Ming Chang, Ka-Un Chan, Wei-Ming Chiu, Shih-Min Lin
Publikováno v:
2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.
A fully integrated transmitter front end with on-chip power amplifier (PA) in 0.18 um CMOS technology is presented. The on-chip PA employs dynamic bias technique to reduce power consumption and enhance linearity. In the measurement, it reveals the ou
Autor:
Shih-Chieh Yen, Ying-Yao Lin, Tzung-Ming Chen, Chao-Cheng Lee, Jiun-Zen Huang, Ka-Un Chan, Ming-Chong Huang, Chao-Hua Lu, Yung-Ming Chiu, Bin-I Chang, Che-Sheng Hu, Wen-Shan Wang, Ying-Hsi-Lin
Publikováno v:
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006.
A low-power full-band 802.11abg transceiver in 0.15/spl mu/m CMOS technology is presented. It shows 4.4/4dB low noise figures in 2.4/5GHz receiver chains. An on-chip PA (power amplifier) delivers 20dBm output P/sub 1dB/ -40 to 140/spl deg/C operation