Zobrazeno 1 - 10
of 25
pro vyhledávání: '"K.T. San"'
Publikováno v:
IEEE Transactions on Electron Devices. 42:150-159
This paper is concerned with the effects of the source bias during the erase operation on the reliability of Flash EPROM devices. It will be shown that positive charge in the tunnel oxide, mostly generated by the erase operation, is a major cause of
Publikováno v:
IEEE Electron Device Letters. 13:328-331
A method for determining the capacitive coupling coefficients of flash erasable programmable read only memories (EPROMs) is introduced. This technique relies on the Fowler-Nordheim erase measurements and source/drain junction leakage characteristics
Autor:
K.T. San, Malgorzata Jurczak, Bertrand Parvais, Willy Sansen, Stefaan Decoutere, Morin Dehan, Abdelkarim Mercha, Guido Groeseneken, V. Subramanian
Publikováno v:
2007 IEEE International SOI Conference.
FinFET architecture results in high level of parasitics that offset the performance gain that can be achieved through gate length scaling. In this work, we investigate technological solutions both at the process integration and layout levels to allev
Autor:
Malgorzata Jurczak, Serge Biesemans, Isabelle Ferain, K. De Meyer, Paola Favia, Ben Kaczer, O. Richard, Christoph Adelmann, N.J. Son, Thomas Kauerauf, S. Van Elshocht, Liesbeth Witters, Nadine Collaert, P. Lehnen, B. Onsia, Hugo Bender, K.T. San
Publikováno v:
2007 IEEE International SOI Conference.
In this work, we investigate the possibility of achieving low VT nMOS FinFETs with single metal gate by using a dysprosium oxide (Dy2O3) cap layer inserted between gate dielectric and metal. We determine an optimum ratio between Dy2O3 and SiO2 gate d
Autor:
T. Schulz, Axel Nackaerts, Florian Bauer, Georg Georgakos, Malgorzata Jurczak, M. Fulde, K.T. San, D. Schmitt-Landsiedel, Christian Pacha, Weize Xiong, K. von Arnim, Klaus Schrüfer, C.R. Cleavelin
Publikováno v:
ESSCIRC
We present an investigation of different layout options for multi-gate-FET (MuGFET) SRAM cell design. Measurement results for four different core cell layouts are shown. Two different gate stacks using single mid-gap metal gates and HfSiON/SiON gate
Autor:
K.T. San, Weize Xiong, Rita Rooyackers, C.R. Cleavelin, Axel Nackaerts, Andrew Marshall, Malgorzata Jurczak, Bart Degroote, Florian Bauer, Abhisek Dixit, Nadine Collaert, K. Schrufer, R. Singanamalla, K. von Arnim, A.C. Pacha, T. Schulz, Emmanuel Augendre, T. Vandeweyer
Publikováno v:
2007 IEEE Symposium on VLSI Technology.
This paper presents an in-depth analysis of digital performance of a Multi-Gate FET technology. Ring oscillators with metal gates and undopedfins show an inverter delay of 13.9ps at 1V, the highest performance of a Multi-Gate FET technology reported
Autor:
A. De Keersgieter, K. von Arnim, Li-Shyue Lai, Damien Lenoble, Axel Nackaerts, K.T. San, Serge Biesemans, Isabelle Ferain, K. De Meyer, Peter Verheyen, N.J. Son, R. Rooyackers, Nadine Collaert, Bartek Pawlak, Abdelkarim Mercha, T. Schulz, Liesbeth Witters, M.J.H. van Dal, Abhisek Dixit, Malgorzata Jurczak
Publikováno v:
ESSDERC 2007 - 37th European Solid State Device Research Conference.
Due to the limited control of the short channel effects, the high junction leakage caused by band-to-band tunneling and the dramatically increased VT statistical fluctuations, the scaling of planar bulk MOSFETs becomes more and more problematic with
Autor:
K.T. San, Tso-Ping Ma
Publikováno v:
IEEE Electron Device Letters. 13:439-441
A technique for determining the sign and the effective density of the trapped oxide charge near the junction transition region, based on the measurement of the gate-induced drain leakage (GIDL) current, is used to investigate the hot-carrier effects
Autor:
Rita Rooyackers, Ian Cayrefourcq, F. Clemente, Nadine Collaert, S. Biesemans, Paul Zimmerman, K.T. San, B. Eyckens, M. Jurczak, Bruno Ghyselen
Publikováno v:
Scopus-Elsevier
This paper describes the performance of nMOS and pMOS tall triple gate (MUGFET) devices with fin widths down to 20 nm fabricated for the first time on super critical strained Si on insulator (SC-SSOI). The electrical and muRaman measurements show tha
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4858f872850f661ab2c5d7a62859c534
http://www.scopus.com/inward/record.url?eid=2-s2.0-41149163285&partnerID=MN8TOARS
http://www.scopus.com/inward/record.url?eid=2-s2.0-41149163285&partnerID=MN8TOARS
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