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Publikováno v:
ISCAS (1)
This paper reports on the design and implementation of a process, temperature and supply compensated 7-MHz clock oscillator in a 0.25 /spl mu/m, double poly, 5-metal CMOS process. The clock generator is based on a 3-stage differential ring oscillator
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::57a9551f90f011bfc4fa2d7d25603a78
https://doi.org/10.1109/iscas.2003.1205658
https://doi.org/10.1109/iscas.2003.1205658
