Zobrazeno 1 - 10
of 13
pro vyhledávání: '"K. Triantopoulos"'
Autor:
A. Chasin, J. Franco, K. Triantopoulos, H. Dekkers, N. Rassoul, A. Belmonte, Q. Smets, S. Subhechha, D. Claes, M. J. van Setten, J. Mitard, R. Delhougne, V. Afanas'ev, B. Kaczer, G. S. Kar
Publikováno v:
2021 IEEE International Electron Devices Meeting (IEDM).
Autor:
Mikael Casse, K. Triantopoulos, F. Gaillard, Gerard Ghibaudo, Sebastien Haendler, Maud Vinet, Sylvain Barraud, Emmanuel Vincent
Publikováno v:
IEEE Transactions on Electron Devices
IEEE Transactions on Electron Devices, Institute of Electrical and Electronics Engineers, 2019, pp.1-8. ⟨10.1109/TED.2019.2919924⟩
IEEE Transactions on Electron Devices, 2019, pp.1-8. ⟨10.1109/TED.2019.2919924⟩
IEEE Transactions on Electron Devices, Institute of Electrical and Electronics Engineers, 2019, pp.1-8. ⟨10.1109/TED.2019.2919924⟩
IEEE Transactions on Electron Devices, 2019, pp.1-8. ⟨10.1109/TED.2019.2919924⟩
Self-heating in fully depleted silicon-on-insulator (FDSOI) metal–oxide–semiconductor field-effect transistors (MOSFETs) is experimentally studied using the gate resistance thermometry technique, in a wide temperature range from 300 down to 4.2 K
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::826169134faa84417472dafd090e097b
https://hal.archives-ouvertes.fr/hal-02161716
https://hal.archives-ouvertes.fr/hal-02161716
Autor:
R. Prieto, Pascal Vivet, Jean Michailos, G. Savelli, Louis-Michel Collin, Jean-Philippe Colonna, H. Beckrich-Ros, Montse Vilarrubí, Julie Widiez, Perceval Coudrain, Luc G. Fréchette, K. Triantopoulos, M. Shirazi, Jérôme Barrau, Kremena Vladimirova, Q. Struss, Hassan Azarkish, Gerard Laguna
Publikováno v:
2018 IEEE Symposium on VLSI Technology
2018 IEEE Symposium on VLSI Technology, Jun 2018, Honolulu, France. pp.15-16, ⟨10.1109/VLSIT.2018.8510677⟩
2018 IEEE Symposium on VLSI Technology, Jun 2018, Honolulu, France. pp.15-16, ⟨10.1109/VLSIT.2018.8510677⟩
This paper describes evolutions of circuit environment to face an ever-increasing thermal challenge, from early design stage down to the final package. To illustrate this critical concern we give a portrayal of innovative technologies and concepts st
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4c87c9d7139d2ebf0c281c3203a3ab34
https://hal.archives-ouvertes.fr/hal-02073365
https://hal.archives-ouvertes.fr/hal-02073365
Autor:
M. Vinet, M. Casse, F. Gaillard, Perrine Batude, Gerard Ghibaudo, A. Tsiara, C. Fenouillet-Beranger, K. Triantopoulos, Laurent Brunet, X. Garros
Publikováno v:
2018 VLSI-Technology Technical Digest
2018 IEEE Symposium on VLSI Technology
2018 IEEE Symposium on VLSI Technology, Jun 2018, Honolulu, United States. pp.75-76, ⟨10.1109/VLSIT.2018.8510625⟩
2018 IEEE Symposium on VLSI Technology
2018 IEEE Symposium on VLSI Technology, Jun 2018, Honolulu, United States. pp.75-76, ⟨10.1109/VLSIT.2018.8510625⟩
session T7: Process and Material Technology; International audience; We investigate in detail, for the first time, both performance and reliability of a 3D sequential integration process. It is clearly demonstrated that the top level transistor can b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::33ffeae25bfb98a71b7c4cd8de991640
https://hal.archives-ouvertes.fr/hal-02050384
https://hal.archives-ouvertes.fr/hal-02050384
Autor:
C. Fenouillet-Beranger, Perrine Batude, M. Casse, B. Mathieu, G. Reimbold, Gerard Ghibaudo, Laurent Brunet, M. Vinet, K. Triantopoulos
Publikováno v:
2017 IEDM Technical Digest
2017 IEEE International Electron Devices Meeting (IEDM)
2017 IEEE International Electron Devices Meeting (IEDM), Dec 2017, San Francisco, United States. pp.7.6.1-7.6.4, ⟨10.1109/IEDM.2017.8268348⟩
2017 IEEE International Electron Devices Meeting (IEDM)
2017 IEEE International Electron Devices Meeting (IEDM), Dec 2017, San Francisco, United States. pp.7.6.1-7.6.4, ⟨10.1109/IEDM.2017.8268348⟩
session 7: Characterization, Reliability, and Yield: Reliability of Advanced Devices (7.6); International audience; We present for the first time an experimental study of thermal effects in 3D sequential integration, including Self-Heating Effect (SH
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::640d5fdfc95e64cdca800fe42ef9b135
https://hal.archives-ouvertes.fr/hal-02050229
https://hal.archives-ouvertes.fr/hal-02050229
Autor:
C. Fenouillet-Beranger, Laurent Brunet, Perrine Batude, K. Triantopoulos, G. Reimbold, Gerard Ghibaudo, Mikael Casse
Publikováno v:
2017 S3S Proceedings
2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Oct 2017, Burlingame, United States. pp.6.4, ⟨10.1109/S3S.2017.8309239⟩
2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Oct 2017, Burlingame, United States. pp.6.4, ⟨10.1109/S3S.2017.8309239⟩
session: Modeling and Characterization; International audience; We present an experimental study of thermal effects in thin film FDSOI MOSFETs, with a focus on the impact of self-heating effect (SHE) on drain current. We have performed thermal resist
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