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Autor:
Yoshihiro Minami, Naoki Kusunoki, Akihiro Nitayama, Takeshi Hamamoto, Tomoaki Shino, Katsuyuki Fujita, A. Sakamoto, Hiroomi Nakajima, Takashi Ohsawa, T. Yamada, Mutsuo Morikado, K. Inoh, Tomoki Higashi, Kosuke Hatsuda
Publikováno v:
IEEE Transactions on Electron Devices. 54:563-571
A 128-Mb silicon-on-insulator dynamic random access memory with floating-body cell (FBC) has been successfully developed for the first time. Two technologies have been newly implemented, namely: 1) the optimized well structure and 2) Cu wiring. The w
Autor:
Tomoki Higashi, Kosuke Hatsuda, Tomoaki Shino, Takeshi Hamamoto, Tohru Furuyama, Yoshihiro Minami, Katsuyuki Fujita, Hiroomi Nakajima, Shuso Fujii, Shigeyoshi Watanabe, Takashi Ohsawa, Mutsuo Morikado, K. Inoh
Publikováno v:
IEEE Journal of Solid-State Circuits. 41:135-145
A 128-Mb SOI DRAM has been developed featuring the floating body cell (FBC). To keep the cell data state from being degraded by the word-line (WL) disturb due to the charge pumping and to reduce the refresh busy rate, a sense amplifier (S/A) is arran
Autor:
Takashi Ohsawa, K. Inoh, Mutsuo Morikado, Tomoaki Shino, Akihiro Nitayama, Takeshi Hamamoto, Naoki Kusunoki, Katsuyuki Fujita, Hiroomi Nakajima, Tomoki Higashi, Yoshihiro Minami
Publikováno v:
IEEE Transactions on Electron Devices. 52:2220-2226
A one-transistor memory cell on silicon-on-insulator, called floating-body cell (FBC), has been developed and demonstrated. Threshold voltage difference between the "0"-state and the "1"-state, which is a key parameter for realizing a large-scale mem
Autor:
Sadayuki Yoshitomi, Tomoaki Shino, Tsuneaki Fuse, Shigeru Kawanaka, Makoto Yoshimi, T. Yamada, H. Nii, J. Matsunaga, Yasuhiro Katsumata, Shigeyoshi Watanabe, K. Inoh
Publikováno v:
IEEE Transactions on Electron Devices. 49:414-421
High-frequency characteristics of SOI lateral BJTs designed for 2-GHz radio frequency (RF) applications are measured and compared for various link-base length, emitter width, and collector structure. Based on experimental data and device simulation,
Autor:
T. Yamada, Yasuhiro Katsumata, Shigeru Kawanaka, Tomoaki Shino, Makoto Yoshimi, H. Nii, K. Inoh
Publikováno v:
IEEE Transactions on Electron Devices. 47:1536-1541
In this paper, a novel lateral bipolar transistor on thin film silicon-on-insulator (SOI) is presented. With a small emitter size of 0.12/spl times/3.0 /spl mu/m/sup 2/, low base resistance of 270 /spl Omega/ due to a novel Co silicided base electrod
Autor:
Hiroshi Iwai, H. Nii, Sadayuki Yoshitomi, Hiroshi Naruse, Hiroomi Nakajima, K. Inoh, Yasuhiro Katsumata, C. Yoshino, H. Furuya, Hiroyuki Sugaya
Publikováno v:
IEEE Transactions on Electron Devices. 46:712-721
In this paper, a 0.3-/spl mu/m BiCMOS technology for mixed analog/digital application is presented. A typical emitter area of this technology is 0.3 /spl mu/m/spl times/1.0 /spl mu/m. This technology includes high f/sub max/ of 37 GHz at the low coll
Autor:
Y Sano, Y Suzuki, S Itoi, Y Hayashi, S Takagi, I Kato, K Inoh, S Saito, N Yokote, T Morita Ogawa
Publikováno v:
European Journal of Hospital Pharmacy. 22:A115.2-A115
Background Antineoplastic drugs have often been shown to be mutagenic, teratogenic and carcinogenic, and these drugs are recommended to be prepared in a biological safety cabinet (BSC). Among them, 5-fluorouracil (5-FU) is a common cytotoxic antineop
A Floating Body Cell (FBC) fully Compatible with 90nm CMOS Technology Node for Embedded Applications
Autor:
Hiroyoshi Tanimoto, Takeshi Hamamoto, Tomoki Higashi, Naoki Kusunoki, Hiroomi Nakajima, Kosuke Hatsuda, Nobutoshi Aoki, A. Sakamoto, K. Inoh, Takashi Ohsawa, Mutsuo Morikado, Yoshihiro Minami, Akihiro Nitayama, Katsuyuki Fujita, Tomoaki Shino
Publikováno v:
Scopus-Elsevier
Floating Body Cell (FBC) is a one-transistor memory cell on SOI substrate, which aims high density embedded memory on SOC. In order to verify this memory cell technology, a 128Mb SOI DRAM with FBC has been designed and successfully developed. The mem
Autor:
Tomoki Higashi, Fumiyoshi Matsuoka, Takeshi Hamamoto, Y. Kajitani, J. Nishimura, M. Nakajima, Yohji Watanabe, Takashi Ohsawa, Mutsuo Morikado, Tomoaki Shino, Katsuyuki Fujita, Yoshihiro Minami, A. Sakamoto, Nobuyuki Ikumi, Akihiro Nitayama, Ryo Fukuda, K. Inoh, Kosuke Hatsuda, Naoki Kusunoki
Publikováno v:
2006 International Electron Devices Meeting.
Technologies and improved performance of the Floating Body RAM are demonstrated. Reducing SOI thickness to 43nm, a 16Mb chip yield of 68% has been obtained. Device simulation proves that the Floating Body Cell is scalable to the 32nm node keeping sig