Zobrazeno 1 - 10
of 63
pro vyhledávání: '"K. Helmreich"'
Publikováno v:
Advances in Radio Science, Vol 17, Pp 51-57 (2019)
An existing analytical transmission line model to describe propagation properties of coplanar waveguides including dispersion and radiation effects was extended to take into account surface roughness of conductor traces. The influence of parasitics i
Externí odkaz:
https://doaj.org/article/49b42fe7d9e448c4b1fc3e651a29fef3
Publikováno v:
Microelectronic Engineering. 24:71-80
Electron beam testers, due to their high spatial resolution, are accepted tools for chip-internal measurements on today's sub-micrometer structures. To keep pace also with the development of high-speed integrated circuits, though, the temporal resolu
Publikováno v:
Microelectronic Engineering. 16:173-182
Electron beam testers today have become an important tool for fault localization in integrated circuits. However, they allow for the measurement of chip-internal voltage signals only, whereas, in many cases, measurement access to chip-internal curren
Publikováno v:
2009 Design, Automation & Test in Europe Conference & Exhibition.
Publikováno v:
Proceedings of the IEEE Custom Integrated Circuits Conference.
This paper introduces a novel aRRroach for mauuing netn'mes to layout elements without using -layout-versus-;chimatic tools. Using this technique, a program has been developed that analyzes layouts, computes an observability degree for electron or la
Publikováno v:
ITC
This paper introduces a new method for the selection of optinuxl probing points in chip-internal e-beam testing by applying a set ofprobingpoint selection rules to the complete area of the desired wire. Conznzvrcially available design rule check (DRC
Publikováno v:
Proceedings ETC 93 Third European Test Conference.
The comparison of measured versus expected signals is the basic operation of any test process. It becomes a critical task especially when rather noisy contactless measurement techniques are employed for prototype debug and quality assurance purposes.
Autor:
G. Reinwardt, K. Helmreich
Publikováno v:
ITC
Virtual test has proven its enormous advantages for test development, yet the use of deterministic simulation models prevented reproduction of statistical effects. This paper introduces a virtual test concept that includes noise and jitter phenomena.
Autor:
K. Helmreich
Publikováno v:
ITC
Interfacing DUTs and ATE for testing at clock rates in the high hundreds of MHz with timing accuracy constraints of a few ten picoseconds and high pin count or high parallelism requirements significantly increases device interface development efforts