Zobrazeno 1 - 10
of 32
pro vyhledávání: '"K. Gaedke"'
Publikováno v:
Journal of Comparative Pathology. 116:291-301
Brain and other tissues of three dogs aged 4-21 months with inclusion body polioencephalitis caused by canine distemper virus (CDV) were examined for CDV nucleoprotein (N) antigen and mRNA distribution. Two animals (nos 3 and 1) had suddenly shown ce
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::1b8a59d96f65816a2647126ffbae0c14
https://doi.org/10.1016/s0021-9975(97)80004-7
https://doi.org/10.1016/s0021-9975(97)80004-7
Publikováno v:
IEEE Transactions on Circuits and Systems for Video Technology. 5:453-464
The VLSI implementation of monolithic parallel processor architectures is supported by the ongoing progress of semiconductor technology. Nevertheless, a cost efficient realization of flexible parallel processors, suitable for a broad range of video p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5eba50d6db4537fd4fe2a368496c1bf6
https://doi.org/10.1109/76.473558
https://doi.org/10.1109/76.473558
Publikováno v:
IEEE Transactions on Circuits and Systems for Video Technology. 2:221-230
The authors discuss the performance of multiprocessor architectures to be applied for video coding algorithms. SIMD, SIMD cluster, and MIMD architectures are studied by a unified performance approach under specific constraints of video coding algorit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::63f5b8c46ad4f951a19dc24120fbb1c1
https://doi.org/10.1109/76.143421
https://doi.org/10.1109/76.143421
Publikováno v:
ISCAS
The architecture and VLSI implementation of a programmable HD real-time motion estimator is presented. Due to the programmability, main video compression standards like MPEG-2, H.264, and VC-1 are supported. A sophisticated data flow concept in combi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::38791222ef84d0e19bcab8f4f6744f54
https://doi.org/10.1109/iscas.2007.378826
https://doi.org/10.1109/iscas.2007.378826
Publikováno v:
International Conference on Consumer Electronics.
The architecture and implementation of a programmable video signal processor for multimedia applications is presented. The processor has been realized in a 0,6 pm CMOS technology and provides a peak performance of 1.2 Giga Arithmetic Operations per S
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::551423168b464577bcbe3e15734b7cbf
https://doi.org/10.1109/icce.1996.517259
https://doi.org/10.1109/icce.1996.517259
Publikováno v:
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems.
Discusses a VLSI-based multiprocessor architecture for real-time processing of video coding applications. The architecture consists of multiple identical processing elements and is characterized as MIMD (multiple instruction multiple data). The archi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3f294557fede56342eb7db1f8ef426f7
https://doi.org/10.1109/iscas.1992.230352
https://doi.org/10.1109/iscas.1992.230352
Publikováno v:
[1992] Proceedings International Conference on Wafer Scale Integration.
The performance of multiprocessor architectures for real-time video processing applications, consisting of bus connected identical processing elements, is discussed. The regular structure of such architectures supports a large area integration. The p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::720ed2b5a81d41638655c0087dbb2f37
https://doi.org/10.1109/icwsi.1992.171792
https://doi.org/10.1109/icwsi.1992.171792
Publikováno v:
ISCAS
A fault-tolerant discrete cosine transform (DCT)-architecture based on distributed arithmetic is developed. Fault-tolerance is achieved through a combination of distributed and residue arithmetic units. The implementation area of the presented archit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b86d8794a714fedd37e6b705d962c775
https://doi.org/10.1109/iscas.1993.394040
https://doi.org/10.1109/iscas.1993.394040
Publikováno v:
ICECS
A development system for investigations on video signal processing in multimedia applications has been developed. This system is based on the single chip multiprocessor array MAXPE9 which integrates 9 programmable video signal processing elements AxP
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::812fc592922363b0c062f5239c21af22
https://doi.org/10.1109/icecs.1996.584626
https://doi.org/10.1109/icecs.1996.584626
Publikováno v:
1996 Proceedings. Eighth Annual IEEE International Conference on Innovative Systems in Silicon.
The architecture and implementation of a programmable processing element dedicated as building block for a large area integrated multiprocessor system is presented. The processor element allows an efficient implementation of video coding standards. I
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::35e4ec4dfb01cdb7ccf45a11e1f18acf
https://doi.org/10.1109/iciss.1996.552416
https://doi.org/10.1109/iciss.1996.552416