Zobrazeno 1 - 10
of 1 036
pro vyhledávání: '"K. -J. Range"'
Publikováno v:
Applied Physics A: Materials Science & Processing. 75:591-595
We performed measurements of gettering efficiencies for Cu in silicon wafers with competing gettering sites. Epitaxial wafers (p/p+) boron-doped with a polysilicon back side allowed us to compare p+ gettering with polysilicon gettering. We further me
Publikováno v:
Applied Physics A: Materials Science & Processing. 75:525-534
Based on experimental findings we set up calculations of numerical modeling of gettering efficiencies for Cu in various silicon wafers. Gettering efficiencies for Cu were measured by applying a reproducible spin-on contamination in the 1012 atoms/cm2
Publikováno v:
Applied Physics A: Materials Science & Processing. 74:711-718
We have performed measurements on the gettering efficiencies for Ni in different silicon wafers. Gettering efficiencies were measured of wafers grown by different crystal-growth techniques, such as Czochralski-grown (CZ) and floating zone (FZ), as we
Publikováno v:
Applied Physics A: Materials Science & Processing. 74:545-551
We have measured the gettering efficiencies for Cu and Ni of various silicon wafers, such as MeV-boron-implanted p- polished wafers treated with two different implantation doses of 3×1013 atoms/cm2 B and 1×1015 atoms/cm2 B, respectively. A third ki
Publikováno v:
Applied Physics A. 74:35-39
We have measured the gettering efficiencies for Cr, Mn, Fe, Co, Ni and Cu in p/p+ epitaxial wafers. The gettering test started with a reproducible spin-on contamination on the front side of the wafers in the 1012–1014 atoms/cm2 range, followed by t
Autor:
K.-J. Range, M. Andratschke
Publikováno v:
Materials Science Forum. :659-664
Publikováno v:
Applied Physics A Materials Science & Processing. 73:137-142
We have measured the gettering efficiencies for Cu and Ni in p/p-Si epitaxial wafers. The wafers were pretreated to obtain oxygen precipitates of different sizes and densities in the bulk. Gettering tests started with a reproducible spin-on spiking i
Publikováno v:
Microelectronic Engineering. 56:153-156
We have performed a gettering efficiency (GE) test at different stages in a 0.18 μm LTB CMOS process simulation with maximal temperatures of 1000°C. Four sorts of wafer substrates (epi, polished) were processed to the point before the step to be st
Publikováno v:
Applied Physics A Materials Science & Processing. 72:351-356
The integrity of ultrathin gate oxides was investigated as a function of polished and epitaxial wafer surfaces with various gettering sites. After intentional contamination of wafers with 1×1011 atoms/cm2 and 5×1012 atoms/cm2 Cu and Ni by a spin-on
Publikováno v:
Materials Science and Engineering: B. 73:95-98
We have studied the gettering efficiencies of copper and nickel in silicon wafers with polysilicon-, stacking fault- and He-implanted backsides. The gettering test begins with a controlled spin-on spiking in the range of low 10 12 atoms cm −2 , fol