Zobrazeno 1 - 10
of 112
pro vyhledávání: '"K, Kawarada"'
Autor:
Y. Iwami, K. Kawarada, H. Miyasawa, Hatsue Kakuta, Nobuhiro Takahashi, Ikuho Kojima, Hideaki Mayanagi
Publikováno v:
Oral Microbiology and Immunology. 17:239-244
A pH-sensitive fluorescent dye, 2', 7'-bis-(2-carboxyethyl)-5 and 6-carboxyfluorescein (BCECF), was used to determine intracellular pH (pH(in)). The efflux of BCECF loaded into oral streptococcal cells was determined after incubation of the cells at
Publikováno v:
Oral microbiology and immunology. 17(4)
A pH-sensitive fluorescent dye, 2', 7'-bis-(2-carboxyethyl)-5 and 6-carboxyfluorescein (BCECF), was used to determine intracellular pH (pH(in)). The efflux of BCECF loaded into oral streptococcal cells was determined after incubation of the cells at
Akademický článek
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Publikováno v:
Electronics and Communications in Japan (Part II: Electronics). 70:34-46
This paper will describe a method for broadening the bandwidth of gain controllable monolithic amplifier circuits for the purpose of the application to the repeater circuits in the Gb/s optical transmission systems. The gain controllable differential
Publikováno v:
IEEE Journal of Solid-State Circuits. 16:424-429
A high speed 1-kbit ECL RAM with a typical access time of 2.7 ns and power dissipation of 500 mW has been developed, using a novel LSI fabrication process technology, together with a new reference circuit configuration. This paper describes an integr
Publikováno v:
IEEE Journal of Solid-State Circuits. 21:417-423
Equalizing amplifiers for gigabit optical fiber transmission systems requires a 65-dB gain (S21) with a gigahertz bandwidth. However, this gain has the potential to cause significant parasitic oscillation. Consequently, developing a useful stabilizat
Publikováno v:
IEEE Transactions on Electron Devices. 26:886-892
A 4096-bit ECL random-access memory using high-density I2L memory cell has been developed. Novel ECL circuit techniques and I2L flip-flop memory cells are introduced for realizing high-speed performance, low-power operation, and small chip size. It o
Publikováno v:
IEEE Journal of Solid-State Circuits. 13:656-663
A 1024-bit ECL RAM with greatly improved speed performances was developed. Typical access time and write cycle time are as short as 7.5 and 10 ns, respectively, under 784 mW of power dissipation, achieving a power and access-time product as small as
Publikováno v:
IEEE Journal of Solid-State Circuits. 17:605-609
To realize a low-cost and highly reliable pushbutton dialer, a DMFO (digital multifrequency oscillator) LSI has been developed. DMFO is a one-chip monolithic LSI in an IIL-analog combination employing the frequency synthesis principle. This synthesiz
Publikováno v:
IEEE Journal of Solid-State Circuits. 17:1144-1149
A high-voltage BORSHT LSI family for an all solid-state subscriber line interface circuit in a digital local switching system has been developed. The family consists of a 320 V dielectrically isolated RTLSI, a 60 V bipolar BSH-LSI, and a CMOS control