Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Justyna Zawada"'
Autor:
Justyna Zawada, Renata Sławińska
Publikováno v:
Forum Bibliotek Medycznych, Vol 14, Iss 1, Pp 14-29 (2021)
The community of Polish medical libraries has been cooperating on numerous projects and initiatives for many years. Recently, eight libraries have created a joint platform for the promotion of research outputs and research potential of eight medical
Externí odkaz:
https://doaj.org/article/a844bcd131c641d384ea68ebb5e4fa30
Publikováno v:
Forum Bibliotek Medycznych, Vol 12, Iss 1, Pp 9-17 (2020)
Each year an EAHIL conference or workshop on medical librarianship is organised. In 2019 a workshop took place in Basel, Switzerland and offered us a chance to network and establish new relations as well as to improve our professional skills, acquire
Externí odkaz:
https://doaj.org/article/37f3b5b9f1f848d5807c7fc96eb8514e
Autor:
Justyna Zawada
Publikováno v:
Forum Bibliotek Medycznych, Vol 11, Iss 2, Pp 53-64 (2019)
The article provides a brief description of the Mendeley reference manager – its evolution and functions – as well as sum-marizes the course, the experiences and the conclusions of the Mendeley Institutional Edition project run at the Wroclaw Med
Externí odkaz:
https://doaj.org/article/79236e3e4b3746d5bd533e4a5a3ee93e
Autor:
Kuen-Jong Lee, Sudhakar M. Reddy, Chong-Siao Ye, Shi-Xuan Zheng, Janusz Rajski, Wu-Tung Cheng, Justyna Zawada, Mark Kassab, Chen Wang, Fong-Jyun Tsai
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 41:2323-2336
Test costs for large industrial designs increase rapidly in recent years. On-chip test compression hardware has become a pragmatic technology to cut down the overall test costs by reducing test data volume. Determining the input and output channel co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d61f50163eaa92a209e113e0c99da404
https://doi.org/10.1109/tcad.2021.3099100
https://doi.org/10.1109/tcad.2021.3099100
Autor:
Justyna Zawada, Nilanjan Mukherjee, Elham Moghaddam, Janusz Rajski, Jerzy Tyszer, Jedrzej Solecki
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 38:1028-1041
Logic built-in self-test (LBIST) is now increasingly used with on-chip test compression as a complementary solution for in-system test, where high quality, low power, low silicon area, and most importantly short test application time are key factors
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::44883a2ec596e10d7eaf7efdd3b5eec0
https://doi.org/10.1109/tcad.2018.2834441
https://doi.org/10.1109/tcad.2018.2834441
Publikováno v:
ITC
This paper presents the structural testing challenges for Intel’s high-performance IA Cores and the novel ATPG solutions developed to overcome them. Intel’s IA Cores employ a design structure which, poses unique testing challenges for industry-st
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4803d101d7a65b6b77ff5cb759dc4c92
https://doi.org/10.1109/itc44778.2020.9325265
https://doi.org/10.1109/itc44778.2020.9325265
Autor:
Yu Huang, Sudhakar M. Reddy, Kuen-Jong Lee, Wu-Tung Cheng, Mark Kassab, Chen Wang, Chong-Siao Ye, Fong-Jyun Tsai, Shi-Xuan Zheng, Janusz Rajski, Justyna Zawada
Publikováno v:
ITC
As the complexity of industrial integrated circuits continue to increase rapidly, test data compression has now become a de facto technology for large designs to reduce the overall test cost. During the design for test (DFT) planning, it is critical
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::514bbb18b491007e003c6b4c087f08c7
https://doi.org/10.1109/itc44778.2020.9325219
https://doi.org/10.1109/itc44778.2020.9325219
Autor:
Michael Chen, Nilanjan Mukherjee, Jerzy Tyszer, Janusz Rajski, Elham Moghaddam, Justyna Zawada
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 37:3020-3030
Growing reverse-engineering attempts to steal or violate a design intellectual property (IP), or to identify the device technology in order to counterfeit integrated circuits (ICs), raise serious concerns in the IC design community. As the informatio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6a556a0c1553471db2257082e7257b83
https://doi.org/10.1109/tcad.2018.2801240
https://doi.org/10.1109/tcad.2018.2801240
Autor:
Janusz Rajski, Derek Feltham, Nilanjan Mukherjee, Elham Moghaddam, Sudhakar M. Reddy, Justyna Zawada, Yingdi Liu, Cesar Acero, Marek Patyra, Jerzy Tyszer
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25:2949-2961
There is mounting evidence that automatic test pattern generation tools capable of producing tests with high coverage of defects occurring in the large semiconductor nanometer designs unprecedentedly inflate test sets and test application times. A de
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5a3ec1a96f4889637c66871d58d387c0
https://doi.org/10.1109/tvlsi.2017.2717844
https://doi.org/10.1109/tvlsi.2017.2717844
Autor:
Justyna Zawada, Vidya Neerkundar, Nilanjan Mukherjee, Marek Patyra, Janusz Rajski, Derek Feltham, Cesar Acero, Friedrich Hapke, Jerzy Tyszer, Elham Moghaddam
Publikováno v:
IEEE Design & Test. 33:7-14
Test points are known to improve the fault coverage in BIST applications. This article discusses a new class of test points used to improve the ATPG pattern count in designs that employ embedded deterministic test.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6f16b1005cb1db85b99528d7e4355760
https://doi.org/10.1109/mdat.2016.2590980
https://doi.org/10.1109/mdat.2016.2590980