Zobrazeno 1 - 10
of 18
pro vyhledávání: '"Jupyo Hong"'
Publikováno v:
IEEE Transactions on Power Electronics. 38:6015-6023
Autor:
Sunhee Moon, Jupyo Hong, Seung-Wook Park, Young-Do Kweon, Do-Jae Yoo, Chang-Bae Lee, Hyung-Jin Jeon, Jin-soo Kim
Publikováno v:
International Symposium on Microelectronics. 2010:000333-000338
Recently the package market is demanding the smaller package size and the lower impedance electrical path with a short interconnection. The wafer level chip scale package is one of them, which has the solution of the market needs above. However, WLCS
Reliability evaluation and structure design optimization of Wafer Level Chip Scale Packaging (WLCSP)
Publikováno v:
2008 2nd Electronics Systemintegration Technology Conference.
In this study a WLCSP structure in microelectronic application is considered. In the current development of WLCSP solder post is used to bridge the die and solder bump to release part of the stress concentration caused by mismatch of Thermal Expansio
Publikováno v:
2008 2nd Electronics Systemintegration Technology Conference.
WL-CSP (wafer level - chip scale package) has many advantages such as low cost, easy fabrication and ultimate miniature size, even though solder joint reliability (SJR) of conventional WL-CSP is critical weak point of the technology. Therefore, many
Publikováno v:
2008 58th Electronic Components and Technology Conference.
In this study, high brightness LED package is considered. Steady state heat transfer process analysis is firstly carried out using 3-D finite element method. Temperature distribution and thermal resistance of the package are then determined. The FEM
Publikováno v:
2007 International Conference on Electronic Materials and Packaging.
In this study, the warpage of WLAN strip after reflow process, which contains 7times5 WLAN modules, is considered. 3D thermo-mechanical FEM simulation is carried out to find out the warpage distribution and maximum warpage after reflow process. Exper
Publikováno v:
2007 8th International Conference on Electronic Packaging Technology.
System in package (SiP) has the ability to integrate other components, such as passive component and antenna, into a single package to realize complete system functions. However, there are many electrical and mechanical reliability issues including t
Publikováno v:
ASME 2007 InterPACK Conference, Volume 1.
In this paper, wafer level packaging of a surface acoustic wave (SAW) filter is considered. Numerical studies based on a three-dimensional finite element method (FEM) have been conducted in order to evaluate the reliability of a wafer level SAW packa
Autor:
Jae Chun Do, Jin Gu Kim, Jupyo Hong, Tae Hyun Kim, Sung Yi, Yan Shuang Guo, Shan Guo, Chang Mu Jung, Jae Ky Roh
Publikováno v:
ASME 2007 InterPACK Conference, Volume 2.
During the manufacturing process of the system-in-package, it has become susceptible to defects and internal residual stresses when dies, components, electric functionality and geometric complexity have increased. The mismatch of thermal expansion co
Publikováno v:
ASME 2007 InterPACK Conference, Volume 2.
High Brightness (HB) Light emitting diode (LED) technology is becoming the choice for many lighting applications. However, one potential problem with LED based lighting systems is the thermal issue during service, which has restricted LED in the appl