Zobrazeno 1 - 10
of 23
pro vyhledávání: '"Juo-Jung Hung"'
Autor:
Tianwei Li, Kowen Lai, Chi-Ming Hsiao, Xi Chen, Young Shin, Randall Perlow, Hanson Hung-Sen Huang, Ardie Venes, Ada Hing T. Hung, Vijayaramalingam Periasamy, Cynthia Dang, William Ngai, Chun-Ying Chen, Giuseppe Cusmai, Jerry Lin, Bryan Juo-Jung Hung, Loke Kun Tan, Pete Cangiane, Ning-Yi Wang, Gregory Unruh, Xicheng Jiang, Hong Liu, Ramon Gomez, Binning Chen, Yau-Cheng Yang, Maco Sha-Ting Lin, Tao Wang, Aravind Kumar Padyana, James Y. C. Chang, Massimo Brandolini, Ming-Hung Hsieh, Lakshminarasimhan Krishnan, Yen Ding, Deepak Lakshminarasimhan, Acer Wei-Te Chou, Jiangfeng Wu, Jianlong Chen, Yen-Jen Ko, Jackie Koon Lun Wong, Pin-En Su, Wei-Ta Shih, Chun-Sheng Huang, Vincent Cheng-Hsun Yang, Larry Wassermann, Bo Shen, Lin He, Ayaskant Shrivastava
Publikováno v:
IEEE Journal of Solid-State Circuits. 51:845-859
A direct sampling full-band capture (FBC) receiver for cable and digital TV applications is presented. It consists of a 0.18 μm BiCMOS low-noise amplifier (LNA) and a 28 nm CMOS direct RF sampling receiver based on a 2.7 GS/s analog-to-digital conve
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::12dabf14050ca7d254789f3785d92b46
https://doi.org/10.1109/jssc.2015.2511164
https://doi.org/10.1109/jssc.2015.2511164
Autor:
Mo Maggie Zhang, Young Shin, Hung Sen Huang, Yen-Jen Ko, Massimo Brandolini, Wei-Ta Shih, Giuseppe Cusmai, Chun-Sheng Huang, Chun-Ying Chen, Jiangfeng Wu, Yuan Yao, Bryan Juo-Jung Hung, Acer Wei-Te Chou, Rong Wu, Ayaskant Shrivastava, Yen Ding, Greg Unruh, Ming-Hung Hsieh, Ardie Venes, Tao Wang, Karthik Raviprakash, Hemasundar Mohan Geddada, Dominique Yi-Chun Chen, Tianwei Li
Publikováno v:
IEEE Journal of Solid-State Circuits. 50:2922-2934
This paper presents a 28 nm CMOS 10 b SHA-less pipelined/SAR hybrid ADC, designed to enable a direct-sampling receiver system. To achieve low power at 5 GS/s, the ADC combines pipelined and SAR quantizers, powered at 1.8 V and 1 V, respectively. A 2.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c5cddea9b5d1b6c2ba10de1073415f58
https://doi.org/10.1109/jssc.2015.2464684
https://doi.org/10.1109/jssc.2015.2464684
Autor:
Chun-Ying Chen, Shauhyuarn Sean Tsai, Chun-Sheng Huang, Wenbo Liu, Tianwei Li, Loke Kun Tan, Bryan Juo-Jung Hung, Steven T. Jaffe, Jiangfeng Wu, Hung Vu, Wei-Ta Shih, Binning Chen, Lin He, Hing T. Hung
Publikováno v:
IEEE Journal of Solid-State Circuits. 48:1818-1828
This paper introduces multiplying digital-to-analog converter (MDAC) equalization, a digital correction technique for pipeline ADCs that corrects MDAC gain, settling, and other dynamic errors using successive digital FIR filters operating on sub-ADC
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::164c742aef13f349ac1dae9a76efb0fd
https://doi.org/10.1109/jssc.2013.2259013
https://doi.org/10.1109/jssc.2013.2259013
Autor:
Acer Wei-Te Chou, Young Shin, Hung-Sen Huang, Tao Wang, Juo-Jung Hung, Po Tang Yang, Chun-Ying Chen, Massimo Brandolini, Cheng-Hsun Yang, Tianwei Li, Sha-Ting Lin, Ardie Venes, Dongsoo Koh, Jiangfeng Wu, Gregory Unruh, Mo M. Zhang, Rong Wu, Qingqi Dou, Giuseppe Cusmai, Sunny Raj Dommaraju, H. Mohan Geddada, Xi Chen, Wei-Ting Lin
Publikováno v:
ISSCC
In recent years, we have seen the emergence of multi-GS/s medium-to-high-resolution ADCs. Presently, SAR ADCs dominate low-speed applications and time-interleaved SARs are becoming increasingly popular for high-speed ADCs [1,2]. However the SAR archi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::446e93d9536101ebfbfb08c00f6a9e9e
https://doi.org/10.1109/isscc.2016.7418109
https://doi.org/10.1109/isscc.2016.7418109
Publikováno v:
IEEE Journal of Solid-State Circuits. 47:1013-1021
A 12-bit 3 GS/s 40 nm two-way time-interleaved pipeline analog-to-digital converter (ADC) is presented. The proposed adaptive power/ground architecture eliminates the headroom limitations due to the deeply scaled power supply in nanometer CMOS techno
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3d33979a422f2a010cc7649b5028322a
https://doi.org/10.1109/jssc.2012.2185192
https://doi.org/10.1109/jssc.2012.2185192
Autor:
Bruce J. Currivan, Lin He, Loke Kun Tan, Tao Wu, Dongsoo Koh, Young Shin, P. Vorenkamp, Frank Singor, Ramon A. Gomez, Pete Cangiane, Francesco Gatta, James Y. C. Chang, E. Zencir, Leonard Dauphinee, Takayuki Hayashi, Jianhong Xiao, D.S.-H. Chang, G. Cusmai, Hans Eberhart, Massimo Brandolini, M. Introini, Hanli Zou, Tai-Hong Chih, Bryan Juo-Jung Hung
Publikováno v:
IEEE Communications Magazine. 48:88-97
An embedded CMOS digital dual tuner for DOCSIS 3.0 and set-top box applications is presented. The dual tuner down-converts a total of ten 6 MHz Annex B channels or eight 8 MHz Annex A channels, for a maximum data rate of 320 Mb/s in Annex B and 400 M
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::201b5d838e1fb6e8b8290e28e3853489
https://doi.org/10.1109/mcom.2010.5439081
https://doi.org/10.1109/mcom.2010.5439081
Autor:
Karthik Raviprakash, Hemasundar Mohan Geddada, Chun-Sheng Huang, Ardie Venes, Yen Ding, Chun-Ying Chen, Wei-Te Chou, Yen-Jen Ko, Ayaskant Shrivastava, Ming-Hung Hsieh, Rong Wu, Giuseppe Cusmai, Yi-Chun Chen, Tao Wang, Tianwei Li, Mo M. Zhang, Greg Unruh, Juo-Jung Hung, Hung Sen Huang, Massimo Brandolini, Young Shin, Jiangfeng Wu, Wei-Ta Shin
Publikováno v:
ISSCC
The recent emergence of direct sampling in residential broadband satellite and cable receivers has spurred the need for low-power, high-speed (∼5GS/s), mid-resolution (∼10b) A/D converters. Recently, time-interleaved (TI) SARs have been a popular
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e2071599f52751d9a3f2b4970305fd35
https://doi.org/10.1109/isscc.2015.7063129
https://doi.org/10.1109/isscc.2015.7063129
Publikováno v:
IEEE Journal of Solid-State Circuits. 40:2167-2173
A novel SiGe 77 GHz sub-harmonic balanced mixer is presented with a goal to push the technology to its limit [SiGe2-RF transistor (f/sub T/=80 GHz)]. This new topology uses a compact input network not only to achieve high isolation between the LO and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::02b3bc03f1223e899bbd88af1c019ebf
https://doi.org/10.1109/jssc.2005.857347
https://doi.org/10.1109/jssc.2005.857347
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 53:754-761
High-efficiency monolithic SiGe balanced frequency doublers have been developed for Ku- and Ka-band applications. A novel miniature second harmonic reflector is presented, and the impact of the parasitic inductor from emitter to ground is also explor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::200de4cc6cc068c6c8678499b4df8c1b
https://doi.org/10.1109/tmtt.2004.840615
https://doi.org/10.1109/tmtt.2004.840615
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 52:600-606
This paper presents state-of-the-art RF microelectromechanical (MEMS) phase shifters at 75-110 GHz based on the distributed microelectromechanical transmission-line (DMTL) concept. A 3-bit DMTL phase shifter, fabricated on a glass substrate using MEM
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9d9d64b308fbb7da4bb9dae71fc82033
https://doi.org/10.1109/tmtt.2003.821941
https://doi.org/10.1109/tmtt.2003.821941