Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Junnan Shan"'
Autor:
Osama Bin Tariq, Junnan Shan, Georgios Floros, Christos P. Sotiriou, Mario R. Casu, Mihai Teodor Lazarescu, Luciano Lavagno
Publikováno v:
IEEE Access, Vol 9, Pp 54286-54297 (2021)
Ever since transistor cost stopped decreasing, customized programmable platforms, such as field-programmable gate arrays (FPGAs), became a major way to improve software execution performance and energy consumption. While software developers can use h
Externí odkaz:
https://doaj.org/article/db168a37c1c041648add24fffb055994
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Universitat Politècnica de Catalunya (UPC)
Platforms with multiple Field Programmable Gate Arrays (FPGAs), such as Amazon Web Services (AWS) F1 instances, can efficiently accelerate multi-kernel pipelined applications, e.g., Convolutional Neural Networks for machine vision tasks or transforme
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2f7bc1a73ee139d4ef98f54004517282
https://hdl.handle.net/2117/346425
https://hdl.handle.net/2117/346425
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Universitat Politècnica de Catalunya (UPC)
Multi-FPGA platforms, like Amazon AWS F1, can run in the cloud multikernel pipelined applications, like convolutional neural networks (CNNs), with excellent performance and lower energy consumption than CPUs or GPUs. We propose a method to efficientl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::eb0c355b001085a23402b794ab438b2e
http://hdl.handle.net/2117/345016
http://hdl.handle.net/2117/345016
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Universitat Politècnica de Catalunya (UPC)
Multi-FPGA platforms like Amazon Web Services F1 are perfect to accelerate multi-kernel pipelined applications, like Convolutional Neural Networks (CNNs). To reduce energy consumption, we propose to upload at runtime the best power-optimized CNN impl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::024f8c633af712095325941529da3a7b
http://hdl.handle.net/11583/2837760
http://hdl.handle.net/11583/2837760
Publikováno v:
DAC: Annual ACM/IEEE Design Automation Conference; 2019, Issue 56, p493-498, 6p
Publikováno v:
Proceedings of the 56th Annual Design Automation Conference 2019 on-DAC 19
Proceedings of the 56th Annual Design Automation Conference 2019 on -DAC '19
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Recercat. Dipósit de la Recerca de Catalunya
instname
Proceedings of the 56th Annual Design Automation Conference 2019
DAC
Proceedings of the 56th Annual Design Automation Conference 2019 on -DAC '19
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Recercat. Dipósit de la Recerca de Catalunya
instname
Proceedings of the 56th Annual Design Automation Conference 2019
DAC
FPGA-based accelerators demonstrated high energy efficiency compared to GPUs and CPUs. However, single FPGA designs may not achieve sufficient task parallelism. In this work, we optimize the mapping of high-performance multi-kernel applications, like
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; Feb2021, Vol. 40 Issue 2, p301-314, 14p
Publikováno v:
IEEE Transactions on Circuits & Systems. Part II: Express Briefs; Dec2020, Vol. 67 Issue 12, p3073-3077, 5p