Zobrazeno 1 - 10
of 47
pro vyhledávání: '"Junil Lee"'
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 7, Pp 1080-1084 (2019)
We have developed a capacitor-less I&F neuron circuit with a dual gate positive feedback fieldeffect transistor (FBFET) and successfully co-integrated FBFET and CMOS in a wafer. By implementing the neuron circuit with FBFET, we can overcome the limit
Externí odkaz:
https://doaj.org/article/c95f424d327b4298b1995b386268ccee
Autor:
Dae Woong Kwon, Junil Lee, Sihyun Kim, Ryoongbin Lee, Sangwan Kim, Jong-Ho Lee, Byung-Gook Park
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 6, Pp 286-290 (2018)
In this paper, novel boosting scheme using asymmetric pass voltage ( $\text{V}_{\mathrm{ pass}}$ ) is proposed to obtain high channel boosting potential and to reduce program disturbance in 3-D NAND flash memory. The proposed scheme has the same prog
Externí odkaz:
https://doaj.org/article/1cbf20fdf1714e2684c1801d4c0dbd6f
Autor:
Junil Lee
Publikováno v:
Seoul Tax Law Review. 29:221-270
Autor:
Junil Lee
Publikováno v:
The Justice. 193:71-98
Autor:
Changha Kim, Junil Lee, Hyunho Ahn, Jong-Ho Lee, Kitae Lee, So Youn Kim, Sangwan Kim, Ryoongbin Lee, Sihyun Kim, Byung-Gook Park, Hyun-Min Kim
Publikováno v:
IEEE Electron Device Letters. 42:962-965
A novel CMOS-compatible SiGe Tunnel Field-Effect Transistor (TFET) with a high current drivability is demonstrated, which features a vertically-stacked SiGe nanosheet (NS) with high Ge content and gate-all-around(GAA) structure to improve carrier inj
Publikováno v:
IEEE Transactions on Electron Devices. 67:4541-4544
We demonstrate tunnel FET (TFET)-based ternary CMOS (T-CMOS) which can operate at supply voltage ( ${V}_{DD}) V. The TFET T-CMOS consists of the vertical n/p TFETs and their drain current ( ${I}_{D}$ )–gate voltage ( ${V}_{G}$ ) characteristics hav
Publikováno v:
Journal of Nanoscience and Nanotechnology. 20:4298-4302
In this paper, we propose an I-shaped SiGe fin tunnel field-effect transistor (TFET) and use technology computer aided design (TCAD) simulations to verify the validity. Compared to conventional Fin TFET on the same footprint, a 27% increase in the ef
Autor:
Sihyun Kim, So Youn Kim, Ryoongbin Lee, Donghyun Ryu, Junil Lee, Kitae Lee, Sangwan Kim, Jong-Ho Lee, Munhyeon Kim, Byung-Gook Park
Publikováno v:
IEEE Transactions on Electron Devices. 67:2648-2652
In this brief, several issues attributed to the channel-release process in vertically stacked-gate-all-around MOSFETs (GAAFETs) having various nanosheet (NS) widths were rigorously investigated. Because of the finite selectivity of SiGe (sacrificial
Publikováno v:
Journal of Nanoscience and Nanotechnology. 19:6808-6811
In this paper, it is shown that MOL capacitance reduction is one of the major performance boosting knobs for the tunneling field effect transistor (TFET) used for logic application. Low driving current is the weakness of TFET in terms of switching sp
Autor:
Sihyun Kim, Jong-Ho Lee, Do-Bin Kim, Byung-Gook Park, Ryoongbin Lee, Daewoong Kwon, Junil Lee
Publikováno v:
IEEE Transactions on Electron Devices. 66:3326-3330
Read disturbance is analyzed in vertically channel-stacked NAND flash memory, which has string select transistors (SSTs) to access each channel layer independently. Additional read disturbance is observed at the cells adjacent to the selected cell in