Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Junichiro Iba"'
Publikováno v:
IEEE Journal of Solid-State Circuits. 25:109-116
The optically coupled three-dimensional common (3D-OCC) memory is an intelligent memory for a real-time parallel processor system. It consists of a multilayered structure of two-dimensional memory with LEDs and photoconductors. The memory layers are
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2c9e5ae822c994abe74c85b657dc2f9c
https://doi.org/10.1109/4.50292
https://doi.org/10.1109/4.50292
Autor:
Masaru Kito, Junichiro Iba, Y. Tsunashima, A. Sudo, Y. Takegawa, Ichiro Mizushima, Tsutomu Sato
Publikováno v:
1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).
The shape and the surface morphology of the trench structure was successfully transformed by the annealing in hydrogen ambient. The corner was rounded and the surface morphology was smoothened on the inside of the trench. Electrical characteristics o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7960715d6c38a4535a17bd0e6d9ab9a0
https://doi.org/10.1109/vlsit.1998.689258
https://doi.org/10.1109/vlsit.1998.689258
Autor:
E. Hammerl, Hideaki Aochi, M. Jaso, Junichiro Iba, S. Gernhardt, J. Ryan, M. Narita, J. Gambino, Martin Gall, Richard L. Kleinhenz, Herbert L. Ho, L. Nesbit, T. Ohiwa, Gary B. Bronner, T. Mii, S. Yoshikawa, Akihiro Nitayama, H. Takato, H. Ishiuchi, Tsutomu Sato, W. Neumueller, Stephen A. Parke
Publikováno v:
1995 Symposium on VLSI Technology. Digest of Technical Papers.
Results are presented for a fully planarized 0.25 /spl mu/m technology using a trench storage capacitor known as the "BEST" cell. In order to achieve a wide process window for fine patterning, a comprehensive global planarization scheme utilizing che
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ac3d7fba094ad5e42652f2bfd824924a
https://doi.org/10.1109/vlsit.1995.520837
https://doi.org/10.1109/vlsit.1995.520837
Autor:
Peter D. Hoh, Ronald W. Nunes, Will Conley, Joseph P. Kirk, Tsuyoshi Shibata, Junichiro Iba, Donald J. Samuels, Robert L. Campbell, Timothy R. Farrell
Publikováno v:
SPIE Proceedings.
As the competitive pressures of the semiconductor industry drive to feature sizes below 250 nanometer, unconventional imaging approaches are being considered in order to preserve the cost effectiveness of optical lithography. To achieve minimum featu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::13ee63ad0b049c4beafab9bafdd0972d
https://doi.org/10.1117/12.240943
https://doi.org/10.1117/12.240943
Publikováno v:
SPIE Proceedings.
Lithographic performance has typically been evaluated at a single point within the stepper field. However, this evaluation method does not completely provide the total lithographic performance on a chip because of variations introduced by the stepper
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::58b9925f2eb724ea104b1d0806f7f476
https://doi.org/10.1117/12.212761
https://doi.org/10.1117/12.212761
Publikováno v:
Extended Abstracts of the 1989 Conference on Solid State Devices and Materials.
An optically coupled three-dimensional common memory has been proposed to perform real-time parallel data processing at the hardware level. In this memory, high-speed block data transfer is carried out by optical coupling among memory layers with LED
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9144ac9a6b27d6d926e01445fc05b479
https://doi.org/10.7567/ssdm.1989.s-c-4
https://doi.org/10.7567/ssdm.1989.s-c-4