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Publikováno v:
ICCD
Extending VLSI CAD with higher-order logic integrates formal verification with synthesis. The benefits of doing so are: 1) relating instruction-set descriptions to implementations, 2) designing at a higher level of abstraction than at the level of sc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bc17d23467ec265b93c05060c13fcc24
https://doi.org/10.1109/iccd.1995.528795
https://doi.org/10.1109/iccd.1995.528795
Publikováno v:
Proceedings of ICCD '95 International Conference on Computer Design VLSI in Computers & Processors; 1995, p85-94, 10p