Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Jui-Feng Hung"'
Autor:
Jui-Feng Hung, 洪瑞峰
95
As our country has been transiting into the developed country, government diversified policies are inevitable. Therefore, the proportion of National defense budget in total government budgets is getting decreased year by year. We predict that
As our country has been transiting into the developed country, government diversified policies are inevitable. Therefore, the proportion of National defense budget in total government budgets is getting decreased year by year. We predict that
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/21183513555995626470
Autor:
Yu-Mei Cheng, Ren-Shing Cheng, Li-Ling Liao, Jui-Feng Hung, Yu-Lin Chao, Ra-Min Tain, Ming-Ji Dai, Yu-Wei Huang, Heng-Chieh Chien, Chun-Hsien Chien, Wei-Chung Lo, Chau-Jie Zhan, Ching-Kuan Lee, Ming-Jer Kao, Sheng-Tsai Wu, John H. Lau
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 4:1407-1419
In this investigation, a system-in-package (SiP) that consists of a very low-cost interposer with through-silicon holes (TSHs) and with chips on its top and bottom sides (a real 3-D IC integration) is studied. Emphasis is placed on the fabrication of
Publikováno v:
Acta Cardiologica Sinica. 31(6)
To determine the B-type natriuretic peptide (BNP) level in pediatric septic patients, and to investigate its association with cardiovascular dysfunction and clinical outcome.Pediatric patients with sepsis or septic shock were prospectively enrolled i
Autor:
Wei-Chung Lo, Peng-Shu Chen, Chih-Sheng Lin, Sheng-Che Hung, Shih-Hsien Wu, Jui-Feng Hung, Zhe-Hui Lin, Ming-Jer Kao, John H. Lau, Shyh-Shyuan Sheu, Ming-Lin Li, Shinn-Juh Lai
Publikováno v:
International Symposium on Microelectronics. 2012:001221-001228
In this study, the electrical performance of a general TSV structure for high-frequency 3D IC integration applications is investigated. Emphasis is placed on the proposal of an analytical model and the analytical equations of a TSV with all its key p
Autor:
Shyh Shyuan Sheu, Zhe Hui Lin, Peng Shu Chen, Wei Chung Lo, Tzu Kun Ku, Shih Hsien Wu, Jui Feng Hung, Ming Jer Kao, Kuo-Hsing Cheng, Chih-Sheng Lin, Shinn Juh Lai, John H. Lau, Keng Li Su
Publikováno v:
Journal of Microelectronics and Electronic Packaging. 8:140-145
This paper proposes a 3D IC integration TSV testing apparatus, primarily using at least one set of TSV component testing devices with a specific design. Under complex technological conditions, such as varying depth-width ratios of TSVs and heterogene
Autor:
Chien-Chou Chen, Y.-M. Lin, Tzu-Kun Ku, Shyh Shyuan Sheu, T.-C. Chang, John H. Lau, Shih-Hsien Wu, W.-L. Tsai, T. H. Chen, W. Li, Chien-Ying Wu, C.-W. Chiang, C.-D. Ko, C.-H. Chien, S.-Y. Huang, Heng-Chieh Chien, Yu-Lin Chao, Ra-Min Tain, C.-H. Lin, Yu-Hua Chen, Wei-Chung Lo, C.-J. Zhan, Hsiang-Hung Chang, R.-S. Cheng, D.-C. Hu, Shang-Chun Chen, Ming-Jer Kao, Jui-Chin Chen, Ming-Ji Dai, Sheng-Tsai Wu, Yu-Chen Hsin, C.-K. Lee, Pei-Jer Tzeng, Jui-Feng Hung
Publikováno v:
International Symposium on Microelectronics. 2011:000446-000454
The feasibility of a 3D IC integration SiP has been demonstrated in this investigation. The heart of this SiP is a TSV (through-silicon via) interposer with RDL (redistribution layer) on both sides, IPD (integrated passive devices) and SS (stress sen
Autor:
Shyh-Shyuan Sheu, Zue-Hua Lin, Jui-Feng Hung, John H. Lau, Peng-Shu Chen, Shih-Hsien Wu, Keng-Li Su, Chih-Sheng Lin, Shinn-Juh Lai, Tzu-Kun Ku, Wei-Chung Lo, Ming-Jer Kao
Publikováno v:
International Symposium on Microelectronics. 2011:000208-000214
This paper proposes a 3D IC integration TSV testing apparatus, primarily using at least one set of TSV component testing devices with a specific design. Under complex technological conditions, such as varying depth-width ratios of TSVs and heterogene
Autor:
Shyh-Shyuan Sheu, Shih-Hsien Wu, John H. Lau, Peng-Shu Chen, Pei-Jer Tzeng, Tzu-Kun Ku, Zhe-Hui Lin, Ming-Jer Kao, Jui-Feng Hung, Wei-Chung Lo, Ming-Lin Li, Shinn-Juh Lai
Publikováno v:
2012 IEEE 62nd Electronic Components and Technology Conference.
In this study, a method to test blind TSVs in 3D IC integration for their electrical performance is investigated. Emphasis is placed on the development of a novel blind-TSV method by electrical testing on the top side of the TSV-wafer before backgrin
Autor:
Shyh-Shyuan Sheu, Zhe-Hui Lin, Shin-Ge Lee, Ming-Jer Kao, Wei-Chung Lo, Peng-Shu Chen, Jui-Feng Hung, Chun-Te Lin, S. H. Wu, Tzu-Kun Ku, John H. Lau, K. L. Su, Shinn-Juh Lai
Publikováno v:
2012 IEEE 62nd Electronic Components and Technology Conference.
In this study, an on chip bus driver TEG (test element group) has been developed for the data transmission performance at TSVs for 3D IC integration. The on chip bus driver TEG consists of transceiver (TX), receiver (RX) and TSV group which has 2, 4