Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Juejian Wu"'
Autor:
Wenjun Tang, Mingyen Lee, Juejian Wu, Yixin Xu, Yao Yu, Yongpan Liu, Kai Ni, Yu Wang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 70:2398-2411
Autor:
Yuanfan Xu, Huazhong Yang, Xuefei Ning, Zhaoyang Shen, Jialong Liu, Yuzhe Ma, Hengrui Zhang, Juejian Wu, Yu Wang, Guyue Huang, Bei Yu, Haoyu Yang, Kai Zhong, Jingbo Hu, Mingyuan Ma, Yifan He
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems. 26:1-46
With the down-scaling of CMOS technology, the design complexity of very large-scale integrated (VLSI) is increasing. Although the application of machine learning (ML) techniques in electronic design automation (EDA) can trace its history back to the
Autor:
Jianfeng Wang, Nuo Xiu, Juejian Wu, Yiming Chen, Yanan Sun, Huazhong Yang, Vijaykrishnan Narayanan, Sumitha George, Xueqing Li
Publikováno v:
2022 IEEE International Symposium on Circuits and Systems (ISCAS).
Autor:
Xiaoyang Ma, Shan Deng, Juejian Wu, Zijian Zhao, David Lehninger, Tarek Ali, Konrad Seidel, Sourav De, Xiyu He, Yiming Chen, Huazhong Yang, Vijaykrishnan Narayanan, Suman Datta, Thomas Kämpfe, Qing Luo, Kai Ni, Xueqing Li
Publikováno v:
IEEE Electron Device Letters. :1-1
Publikováno v:
IEEE Transactions on Electron Devices. 67:1444-1453
Under the von Neumann computing architecture, the edge devices used for artificial intelligence (AI) and the Internet of Things (IoTs) are limited in terms of latency and energy efficiency due to the movement of data between the memory and the proces
Autor:
Thomas Kampfe, Huazhong Yang, Franz Muller, R. Olivo, Xinrui Guo, Juejian Wu, Yongpan Liu, Xiaoyang Ma, Xueqing Li, Kai Ni
Publikováno v:
ESSCIRC
ESSCIRC 2021-IEEE 47th European Solid State Circuits Conference (ESSCIRC)
European Solid State Circuits Conference (ESSCIRC)
ESSCIRC 2021-IEEE 47th European Solid State Circuits Conference (ESSCIRC)
European Solid State Circuits Conference (ESSCIRC)
This paper investigates reconfigurable physical unclonable function (PUF) design by exploiting the polarization switching variation and stochasticity in ferroelectric field-effect-transistors (FeFETs). The proposed PUFs include 1-transistor/cell (1T/
Autor:
Suman Datta, Xueqing Li, Kai Ni, Jack Sampson, Juejian Wu, Vijaykrishnan Narayanan, Kaisheng Ma, Sumitha George, Yongpan Liu, Sumeet Kumar Gupta, Huazhong Yang
Publikováno v:
IEEE Design & Test. 36:39-45
Editor’s note: This article explores the design of high-density, low-power, and high-speed embedded nonvolatile memory arrays exploiting the unique device characteristics of the emerging ferroelectric FETs. — Vivek De, Intel Corporation
Autor:
Yu Wang, Yi Cai, Huazhong Yang, Guodong Yin, Yongpan Liu, Zhenhua Zhu, Zhengyang Duan, Xueqing Li, Juejian Wu
Compute-in-memory (CiM) is a promising approach to alleviating the memory wall problem for domain-specific applications. Compared to current-domain CiM solutions, charge-domain CiM shows the opportunity for higher energy efficiency and resistance to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::017505535dd82da857d184f150240ad6
Autor:
Xueqing Li, Vijaykrishnan Narayanan, Yu Wang, Mingyuan Ma, Mingyen Lee, Deliang Fan, Juejian Wu, Yongpan Liu, Tang Wenjun, Bowen Xue, Huazhong Yang
Publikováno v:
ISLPED
Compute-in-memory (CiM) is a promising method for mitigating the memory wall problem in data-intensive applications. The proposed bitwise logic-in-memory (BLiM) is targeted at data intensive applications, such as database, data encryption. This work
Publikováno v:
ASP-DAC
Ferroelectric FETs (FeFETs) have emerged as a promising multi-level/cell (MLC) nonvolatile memory (NVM) candidate for low-power applications. This originates from the advantages of both efficient memory access and intrinsic device-level in-memory com