Zobrazeno 1 - 10
of 25
pro vyhledávání: '"Juan Pablo Oliver"'
Publikováno v:
Journal of Computer Science and Technology, Vol 21, Iss 2, Pp e09-e09 (2021)
The dissemination of multi-core architectures and the later irruption of massively parallel devices, led to a revolution in High-Performance Computing (HPC) platforms in the last decades. As a result, Field-Programmable Gate Arrays (FPGAs) are re-eme
Externí odkaz:
https://doaj.org/article/159301d2831a42a0b90d6847d35a3dce
Publikováno v:
Journal of Low Power Electronics. 15:329-337
In this paper, an extensive review of the available publications about comparing estimations versus measurements of power consumption in FPGA technology is carried out. This study reveals that the variety of experimental setups makes it difficult to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2cd520b4bd27693f8ddb08fd86b66a15
https://doi.org/10.1166/jolpe.2019.1622
https://doi.org/10.1166/jolpe.2019.1622
Autor:
Jimena Arruti, Martin Ottavianelli, Alfredo Solari, Pablo Monzon, Pablo Muse, Juan Pablo Oliver
Publikováno v:
2021 IEEE URUCON.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::af927a513b82b8606b82a174359287e0
https://doi.org/10.1109/urucon53396.2021.9647208
https://doi.org/10.1109/urucon53396.2021.9647208
Publikováno v:
2021 40th International Conference of the Chilean Computer Science Society (SCCC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e6d7f568e95e757b7ebb124080493727
https://doi.org/10.1109/sccc54552.2021.9650418
https://doi.org/10.1109/sccc54552.2021.9650418
Publikováno v:
Journal of Computer Science and Technology, Vol 21, Iss 2, Pp e09-e09 (2021)
SEDICI (UNLP)
Universidad Nacional de La Plata
instacron:UNLP
SEDICI (UNLP)
Universidad Nacional de La Plata
instacron:UNLP
The dissemination of multi-core architectures and the later irruption of massively parallel devices, led to a revolution in High-Performance Computing (HPC) platforms in the last decades. As a result, Field- Programmable Gate Arrays (FPGAs) are re-em
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f16c3d120be1d3e255f908a935d21cfd
https://journal.info.unlp.edu.ar/JCST/article/view/1822
https://journal.info.unlp.edu.ar/JCST/article/view/1822
Publikováno v:
IPDPS Workshops
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::57bfb81265444c0d29ab9afb942cfde3
https://doi.org/10.1109/ipdpsw50202.2020.00087
https://doi.org/10.1109/ipdpsw50202.2020.00087
Publikováno v:
Applied Reconfigurable Computing. Architectures, Tools, and Applications ISBN: 9783030445331
ARC
ARC
The solution of sparse triangular linear systems (sptrsv) is the bottleneck of many numerical methods. Thus, it is crucial to count with efficient implementations of such kernel, at least for commonly used platforms. In this sense, Field–Programmab
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ad58969a86f384b359fdc624a2bb6872
https://doi.org/10.1007/978-3-030-44534-8_20
https://doi.org/10.1007/978-3-030-44534-8_20
Autor:
Ignacio Ramirez, Leonardo Steinfeld, Guillermo Dufort y Álvarez, Gadiel Seroussi, Federico Favaro, Juan Pablo Oliver, Julian Oreggioni, Federico Lecumberry, Alvaro Martin
Publikováno v:
IEEE Transactions on Biomedical Circuits and Systems. 12:231-241
This work presents a wireless multichannel electroencephalogram (EEG) recording system featuring lossless and near-lossless compression of the digitized EEG signal. Two novel, low-complexity, efficient compression algorithms were developed and tested
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::0dfcc3191a70e9a420b5482603f3113e
https://doi.org/10.1109/tbcas.2017.2779324
https://doi.org/10.1109/tbcas.2017.2779324
Publikováno v:
Journal of Low Power Electronics. 13:1-9
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::37e6c658d3a7e6d11d4191b2a91d2046
https://doi.org/10.1166/jolpe.2017.1465
https://doi.org/10.1166/jolpe.2017.1465
Autor:
Juan Pablo Oliver, Federico Favaro
Publikováno v:
2019 X Southern Conference on Programmable Logic (SPL).
This paper presents a hardware implementation of a multi-channel EEG lossless compression algorithm. The design is the first step in the development of a low power, wireless recording system for the acquisition of EEG signals. It was written in VHDL
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8e9b4f462425d2dbdce363e4af40537f
https://doi.org/10.1109/spl.2019.8714388
https://doi.org/10.1109/spl.2019.8714388