Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Josué Feliu"'
Publikováno v:
Journal of Parallel and Distributed Computing. 173:94-106
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e0ea54fc8aa6ee9891c805674731d8d9
https://doi.org/10.1016/j.jpdc.2022.11.007
https://doi.org/10.1016/j.jpdc.2022.11.007
Autor:
Lucía Pons, Josué Feliu, Julio Sahuquillo, María E. Gómez, Salvador Petit, Julio Pons, Chaoyi Huang
Publikováno v:
Future Generation Computer Systems. 138:13-25
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::125bcad897d27c2a663fa50ad345dfda
https://doi.org/10.1016/j.future.2022.08.012
https://doi.org/10.1016/j.future.2022.08.012
Publikováno v:
IEEE Transactions on Computers. 71:2646-2658
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::04f95cd12ab3bcf7c0142e58bd79bfbe
https://doi.org/10.1109/tc.2021.3139997
https://doi.org/10.1109/tc.2021.3139997
Autor:
Lucía Pons, Josué Feliu, José Puche, Chaoyi Huang, Salvador Petit, Julio Pons, María E. Gómez, Julio Sahuquillo
Publikováno v:
Future Generation Computer Systems. 131:194-208
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::48d87c4e8f7b6c5735e1da0da460f911
https://doi.org/10.1016/j.future.2022.01.025
https://doi.org/10.1016/j.future.2022.01.025
Publikováno v:
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
ACM Transactions on Architecture and Code Optimization (TACO)
ACM Transactions on Architecture and Code Optimization (TACO)
Superscalar out-of-order cores deliver high performance at the cost of increased complexity and power budget. In-order cores, in contrast, are less complex and have a smaller power budget, but offer low performance. A processor architecture should id
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::979d6070b36d0dec9f2391cf8c3db96e
https://doi.org/10.1145/3499424
https://doi.org/10.1145/3499424
Autor:
Josué Feliu Pérez
Publikováno v:
RiuNet. Repositorio Institucional de la Universitat Politécnica de Valéncia
instname
instname
The recent multicore era and the incoming manycore/manythread era generate a lot of challenges for computer scientists going from productive parallel programming, over network congestion avoidance and intelligent power management, to circuit design i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d3dd1210ff723fbaae9315ca7cb1e633
https://doi.org/10.4995/thesis/10251/79081
https://doi.org/10.4995/thesis/10251/79081
