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pro vyhledávání: '"Joseph C. Kerekes"'
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Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable chip performance within a given power envelope. While CMOS-compatible na
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8b1fd17c85f695cfff0d438e8a401116
https://doi.org/10.1145/1555815.1555809
https://doi.org/10.1145/1555815.1555809
