Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Joseph A. Devore"'
Autor:
Q. Wang, Sameer Pendharkar, Binghua Hu, Philip L. Hower, John K. Arch, John Lin, Kaiyuan Chen, Joe R. Trogolo, Tathagata Chatterjee, Joseph A. Devore
Publikováno v:
Proceedings of the 19th International Symposium on Power Semiconductor Devices and IC's.
A peculiar temperature mismatch between a power LDMOS and its sense FET develops over time resulting in yield losses. The anomaly is traced to trapped charge in the power LDMOS that arises from a seemingly unrelated change in the hydrogen anneal temp
Publikováno v:
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems.
The authors describe some of the new design features which have enabled the latest fuel-injector driver integrated circuits to achieve improved robustness and reliability, together with better fault condition detection during open-circuit conditions
Publikováno v:
ISCAS
Power integrated circuits (PICs) have become much more complex as voltage and current levels and logic content have increased. This has driven numerous advances in testing PICs, both in test hardware and software. Designs have been modified for impro
Publikováno v:
Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216).
A simple method for demonstrating filamentation in lateral power devices is described. The results show that "mathematically perfect" junctions need to have defects added to initiate filamentation. When this is done, two-dimensional simulations exhib
Publikováno v:
Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216).
A novel 2D-simulation method is used to simulate major aspects of the formation of the current filament and to help understand and predict the level of ESD robustness in lateral power devices.
Publikováno v:
Proceedings of the 2000 BIPOLAR/BiCMOS Circuits and Technology Meeting (Cat. No.00CH37124).
Technology is driven by the evolving CMOS roadmap, and as a consequence, it is increasingly difficult to integrate high performance bipolar devices without unduly increasing process complexity. Designers want and need good NPN devices for key circuit
Autor:
John H. Carpenter, C.-Y. Tsai, Sameer Pendharkar, Taylor R. Efland, Ross E. Teggatz, Joseph A. Devore
Publikováno v:
12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094).
A novel lateral power device structure with a very high degree of ESD (electrostatic discharge) robustness is presented. This device called the SCR-LDMOS is a modification of the lateral LDMOSFET with good on state and blocking characteristics.