Zobrazeno 1 - 10
of 101
pro vyhledávání: '"Jose L Nunez-Yanez"'
Autor:
Angeles Navarro, Ruben Gran, Dario Suarez, Rafael Asenjo, Andrés Rodríguez, Jose L Nunez-Yanez, Francisco Corbera
Publikováno v:
Zaguán. Repositorio Digital de la Universidad de Zaragoza
instname
Rodríguez, A, Navarro, A, Asenjo, R, Corbera, F, Gran, R, Suárez, D & Nunez-Yanez, J 2019, ' Exploring heterogeneous scheduling for edge computing with CPU and FPGA MPSoCs ', Journal of Systems Architecture, vol. 98, pp. 27-40 . https://doi.org/10.1016/j.sysarc.2019.06.006
Zaguán: Repositorio Digital de la Universidad de Zaragoza
Universidad de Zaragoza
instname
Rodríguez, A, Navarro, A, Asenjo, R, Corbera, F, Gran, R, Suárez, D & Nunez-Yanez, J 2019, ' Exploring heterogeneous scheduling for edge computing with CPU and FPGA MPSoCs ', Journal of Systems Architecture, vol. 98, pp. 27-40 . https://doi.org/10.1016/j.sysarc.2019.06.006
Zaguán: Repositorio Digital de la Universidad de Zaragoza
Universidad de Zaragoza
This paper presents a framework targeted to low-cost and low-power heterogeneous MultiProcessors that exploits FPGAs and multicore CPUs, with the overarching goal of providing developers with a productive programming model and runtime support to full
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7c6a6126f3249020c13dfcb38dd452ba
http://zaguan.unizar.es/record/89637
http://zaguan.unizar.es/record/89637
Autor:
Samuel Xavier-de-Souza, Kerstin Eder, A. M. Coutinho Demetrios, Arthur Francisco Lorenzon, Kyriakos Georgiou, Daniele De Sensi, Jose L Nunez-Yanez
Publikováno v:
Energies; Volume 13; Issue 9; Pages: 2409
Coutinho Demetrios, A M, Sensi, D D, Lorenzon, A F, Georgiou, K, Nunez-Yanez, J, Eder, K & Xavier-de-Souza, S 2020, ' Performance and Energy Trade-Offs for Parallel Applications on Heterogeneous Multi-Processing Systems ', Energies, vol. 13, no. 9, 2409 . https://doi.org/10.3390/en13092409
Energies
Energies, Vol 13, Iss 2409, p 2409 (2020)
Coutinho Demetrios, A M, Sensi, D D, Lorenzon, A F, Georgiou, K, Nunez-Yanez, J, Eder, K & Xavier-de-Souza, S 2020, ' Performance and Energy Trade-Offs for Parallel Applications on Heterogeneous Multi-Processing Systems ', Energies, vol. 13, no. 9, 2409 . https://doi.org/10.3390/en13092409
Energies
Energies, Vol 13, Iss 2409, p 2409 (2020)
This work proposes a methodology to find performance and energy trade-offs for parallel applications running on Heterogeneous Multi-Processing systems with a single instruction-set architecture. These offer flexibility in the form of different core t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::250d9c8c6b74221310955726e2b6365e
Publikováno v:
PARMA-DITAM@HiPEAC
Embedded intelligence is becoming the primary driver for new applications in industry, healthcare, and automotive, to name a few. The main characteristics of these applications are high computational demand, real-time interaction with the environment
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dd81be9091c80049ba7d3260b2925e0d
https://doi.org/10.1145/3381427.3381428
https://doi.org/10.1145/3381427.3381428
Publikováno v:
PARMA-DITAM@HiPEAC
Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms
Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms
This paper investigates the application of a robust CPU-based power modelling methodology that performs an automatic search of explanatory events derived from performance counters to embedded GPUs. A 64-bit Tegra TX1 SoC is configured with DVFS enabl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8f869bab1258d08899d1bc77c2abd042
Publikováno v:
Hosseinabady, M & Nunez-Yanez, J 2018, ' Dynamic Energy Management of FPGA Accelerators in Embedded Systems ', ACM Transactions on Embedded Computing Systems, vol. 17, no. 3, 63 . https://doi.org/10.1145/3182172
In this article, we investigate how to utilise an Field-Programmable Gate Array (FPGA) in an embedded system to save energy. For this purpose, we study the energy efficiency of a hybrid FPGA-CPU device that can switch task execution between hardware
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::772ad60e68df508c830a6447a23e8c5c
https://doi.org/10.1145/3182172
https://doi.org/10.1145/3182172
Publikováno v:
Nunez-Yanez, J L & Hosseinabady, M 2021, ' Sparse and dense matrix multiplication hardware for heterogeneous multi-precision neural networks ', Array, vol. 12, 100101 . https://doi.org/10.1016/j.array.2021.100101
Array, Vol 12, Iss, Pp 100101-(2021)
Array, Vol 12, Iss, Pp 100101-(2021)
In this paper, we present hardware accelerators created with high-level synthesis techniques for sparse and dense matrix multiplication operations. The cores can operate with different precisions and are designed to be integrated in a heterogeneous C
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ec58f089799dc4cb103f596a06a0e2f9
https://doi.org/10.1016/j.array.2021.100101
https://doi.org/10.1016/j.array.2021.100101
Publikováno v:
Galindo Sanchez, F & Nunez-Yanez, J 2017, ' Energy proportional streaming spiking neural network in a reconfigurable system ', Microprocessors and Microsystems, vol. 53, pp. 57-67 . https://doi.org/10.1016/j.micpro.2017.06.018
This paper presents a high-performance architecture for spiking neural networks that optimizes data precision and streaming of configuration data stored in main memory. The neural network is based on the Izhikevich model and mapped to a CPU-FPGA hybr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c525a2de58c2197b7dafcd2cfe503e40
https://doi.org/10.1016/j.micpro.2017.06.018
https://doi.org/10.1016/j.micpro.2017.06.018
Autor:
Jose L Nunez-Yanez
Publikováno v:
Nunez-Yanez, J 2017, ' Adaptive voltage scaling in a heterogeneous FPGA device with memory and logic in-situ detectors ', Microprocessors and Microsystems, vol. 51, pp. 227-238 . https://doi.org/10.1016/j.micpro.2017.04.021
This paper presents an enhanced tool flow and hardware to allow a host CPU to exploit the timing margins available on a FPGA fabric to improve its performance or reduce its energy and power requirements. Two different case studies are considered to d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f57eedac8c715475a15c79404034b615
https://doi.org/10.1016/j.micpro.2017.04.021
https://doi.org/10.1016/j.micpro.2017.04.021
Autor:
Samuel Xavier-de-Souza, Demetrios A. M. Coutinho, Jose L Nunez-Yanez, Kerstin Eder, Kyriakos Georgiou
Publikováno v:
VLSI-SoC
This work proposes a novel methodology to predict the optimal performance and energy efficiency trade-off configurations of parallel applications running on a two-cluster Heterogeneous Multi-Processing (HMP) system. we propose an analytic performance
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ea68cba99068e6fe73a1e2e6d7f75e85
https://doi.org/10.1109/vlsi-soc.2019.8920384
https://doi.org/10.1109/vlsi-soc.2019.8920384
Autor:
Chenyuan Teng, Jose L Nunez-Yanez, Brenda Gatusch, Asier Marzo, Daniel Connolly-Taylor, William Beasley
Publikováno v:
AHS
We present a software-defined platform for ultrasonic levitation research based on the Xilinx Zynq SoC using an array of ultrasonic transducers. The platform provides controlled movement of the levitated objects as well as object detection based on t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a60b6e99ac0310aa2a9bde4ed61ae529
https://doi.org/10.1109/ahs.2019.000-2
https://doi.org/10.1109/ahs.2019.000-2