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pro vyhledávání: '"Jose Antonio Flores Escobar"'
Publikováno v:
CONIELECOMP
In this work a finite field polynomial multiplier is presented. The multiplier is based on two-step algorithm performing the multiplication with the add and shift algorithm. A FPGA was chosen to implement the multiplier design, resulting the multipli
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eaf65be0a8d0f8309c5b3e685132a2c6
https://doi.org/10.1109/conielecomp.2012.6189902
https://doi.org/10.1109/conielecomp.2012.6189902
