Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Jos van Eijndhoven"'
Publikováno v:
Journal of VLSI signal processing systems for signal, image and video technology. 39:195-212
This paper presents a TriMedia processor extended with an IDCT reconfigurable design, and assesses the performance gain such an extension has when performing MPEG-2 decoding. We first propose the skeleton of an extension of the TriMedia architecture,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fc5076445c27a0d9fcb683d30aef69d6
https://doi.org/10.1007/s11265-005-4840-y
https://doi.org/10.1007/s11265-005-4840-y
Publikováno v:
Philips Research ISBN: 9781402034534
Consumer electronics vendors increasingly deploy shared-memory multiprocessor Systems on Chip (SoC), such as Philips Nexperia, to balance flexibility (late changes, software download, reuse) and cost (silicon area, power consumption) requirements. Wi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e47acd07445921b2fb46be78aac52f42
https://doi.org/10.1007/1-4020-3454-7_5
https://doi.org/10.1007/1-4020-3454-7_5
Publikováno v:
Philips Research ISBN: 9781402034534
Systems-on-Chip (SoC) of the new generation will be extremely complex devices, composed from complex subsystems, relying on abstraction from implementation details. These chips will support the execution of a mix of concurrent applications that are n
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8b4a3ae726bc91d183eb8e91d68042e1
https://doi.org/10.1007/1-4020-3454-7_3
https://doi.org/10.1007/1-4020-3454-7_3
Publikováno v:
Embedded Processor Design Challenges ISBN: 9783540433224
Embedded Processor Design Challenges
Embedded Processor Design Challenges
The paper presents a case study on augmenting a TriMedia/CPU64 processor with a Reconfigurable (FPGA-based) Functional Unit (RFU). We first propose an extension of the TriMedia/CPU64 architecture, which consists of a RFU and its associated instructio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2e85f87b55e5a4e4744edabee3b3a0e1
https://doi.org/10.1007/3-540-45874-3_13
https://doi.org/10.1007/3-540-45874-3_13
Publikováno v:
CODES
Eclipse defines a heterogeneous multiprocessor architecture template for data-dependent stream processing. Intended as a scalable and flexible subsystem of forthcoming media-processing systems-on-a-chip, Eclipse combines application configuration fle
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::65d2f15dfaf78a5d9aa0e8ddd57785fc
https://doi.org/10.1145/774789.774818
https://doi.org/10.1145/774789.774818
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783540441083
FPL
FPL
The ability for providing a hardware platformwhich can be customized on a per-application basis under software control has established Reconfigurable Computing (RC) as a new computing paradigm. A machine employing the RC paradigm is referred to as a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d232358f1f61d68c8e1b333de4ee946a
https://doi.org/10.1007/3-540-46117-5_10
https://doi.org/10.1007/3-540-46117-5_10
Publikováno v:
Embedded Processor Design Challenges ISBN: 9783540433224
Embedded Processor Design Challenges
Embedded Processor Design Challenges
This paper discusses architectural solutions that deal with the high data throughput and the high computational power - two crucial performance requirements of MPEG standards. To increase the data throughput, we define a new data storage facility wit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::89d986735697660657604d13c7d1575e
https://doi.org/10.1007/3-540-45874-3_17
https://doi.org/10.1007/3-540-45874-3_17