Zobrazeno 1 - 10
of 20
pro vyhledávání: '"Jorge Echavarria"'
Design and error analysis of accuracy-configurable sequential multipliers via segmented carry chains
Autor:
Jorge Echavarria, Stefan Wildermann, Oliver Keszocze, Faramarz Khosravi, Andreas Becher, Jürgen Teich
Publikováno v:
it - Information Technology. 64:89-98
We present the design and a closed-form error analysis of accuracy-configurable multipliers via segmented carry chains. To address this problem, we model the approximate partial-product accumulations as a sequential process. According to a given spli
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9fdfe859f18e4990c7cee70d0e74054b
https://doi.org/10.1515/itit-2021-0040
https://doi.org/10.1515/itit-2021-0040
Publikováno v:
2022 IEEE 15th Dallas Circuit And System Conference (DCAS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c76bece954080f98a16123b5b7b33560
https://doi.org/10.1109/dcas53974.2022.9845591
https://doi.org/10.1109/dcas53974.2022.9845591
Publikováno v:
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::614c888988c43ea7d8c8df1c37fed707
https://doi.org/10.1109/iccad51958.2021.9643561
https://doi.org/10.1109/iccad51958.2021.9643561
Publikováno v:
DATE
For very large Boolean circuits most approximate logic synthesis techniques successively apply local approximation transformations affecting only a portion of the whole design. Hence, allowing such transformations to be implemented in polynomial time
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cedf37ba4595aa230e53daadad4aba26
https://doi.org/10.23919/date51398.2021.9473952
https://doi.org/10.23919/date51398.2021.9473952
Publikováno v:
DAC
Most approximate logic synthesis techniques successively apply local approximate transformations to Boolean circuits. Naturally, an efficient, robust, and scalable error estimation technique is due. This paper addresses this problem by propagating er
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::054abb6d479c6a5101614a63267543ad
https://doi.org/10.1109/dac18072.2020.9218536
https://doi.org/10.1109/dac18072.2020.9218536
Publikováno v:
IEEE Embedded Systems Letters. 10:37-40
In this letter, we present a novel methodology to calculate the arithmetic error rate (AER) for deterministic approximate adder architectures, where the calculation of each output bit is restricted to a subset of the input bits, denoted as visibiliti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f9cc6e4b25c2ced14e1d1dcc6393c0c7
https://doi.org/10.1109/les.2017.2760922
https://doi.org/10.1109/les.2017.2760922
Autor:
René Cumplido, Claudia Feregrino-Uribe, Jorge Echavarria, Alicia Morales-Reyes, Miguel A. Salido
Publikováno v:
Engineering Applications of Artificial Intelligence. 104:104386
This paper presents an improved watermarking scheme for soft Intellectual Property (IP) -Cores using Genetic Algorithms (GAs). For this purpose, a watermark signature and an IP-Core behavioral description are translated into Finite State Machines (FS
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::48fe6aabab66276599c60955a8936671
https://doi.org/10.1016/j.engappai.2021.104386
https://doi.org/10.1016/j.engappai.2021.104386
Publikováno v:
FPT
New relaxed quality standards laid down by approximate computing enrich the design pool with architectures dissipating less power, consuming fewer resources or with smaller latencies. In LUT-based FPGA logic approximation, the number of LUTs and late
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7d8fa34d5b11aa29b3111073fad1b2ed
https://doi.org/10.1109/fpt.2018.00065
https://doi.org/10.1109/fpt.2018.00065
Publikováno v:
ICECS
Approximate computing allows tackling conflicting objectives, such as power and accuracy of computations. In this paper, we first describe how knowledge of stimuli's specific features can help in quantifying and improving power savings by means of ap
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0590abc0dbdffd6bf7b2e0b922b3229d
https://doi.org/10.1109/icecs.2018.8618062
https://doi.org/10.1109/icecs.2018.8618062
Publikováno v:
ICCAD
Approximate Computing has emerged as a design paradigm that allows to decrease hardware costs by reducing the accuracy of the computation for applications that are robust against such errors. In Boolean logic approximation, the number of terms and li
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3c3849f773995a4b3416ff7c04d3589c
https://doi.org/10.1145/3240765.3240795
https://doi.org/10.1145/3240765.3240795