Zobrazeno 1 - 10
of 25
pro vyhledávání: '"Joong-Sik Kih"'
Autor:
Man Young Sung, Young Kwon Sung, Hae Chan Park, Joong Sik Kih, Suk Kyoung Hong, Heon Yong Chang, Kun Woo Park, Jin Hong Ahn, Hee Bok Kang
Publikováno v:
Integrated Ferroelectrics. 89:94-105
For a longer working distance between passive tags and the reader, the ferroelectric based technologies are proposed in UHF (860–960 MHz) band transponder. The small ferroelectric capacitor layout area with a stacked capacitor structure over circui
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a8964ef69b6ea3e6fde49c229c3e5b79
https://doi.org/10.1080/10584580601077617
https://doi.org/10.1080/10584580601077617
Autor:
Jae-il Kim, Nam Gyu Rye, Won-Joo Yun, Jong Ho Jung, Kang Youl Lee, Yong-Hoon Kim, Eun Young Park, Chulwoo Kim, Jun Hyun Chun, Hyun-woo Lee, Kwan-Weon Kim, Young-Jung Choi, Byong-Tae Chung, Kwang-Hyun Kim, Joong Sik Kih, Kyung Whan Kim
Publikováno v:
ISCAS
A 7.7mW/1.0ns/1.35V digital delay locked loop has been proposed in this paper. The dual-DLL architecture with racing operation is adopted to achieve low power operation and low jitter, which is primarily caused by the length of the delay line. The me
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::abedfc88f463d425f2f5836d48a8856c
https://doi.org/10.1109/iscas.2010.5537703
https://doi.org/10.1109/iscas.2010.5537703
Autor:
Hyungdong Lee, Kunwoo Park, Hyun Seok Kim, Booho Jung, Joong-Sik Kih, Dae-kun Yoon, Jun Ho Lee
Publikováno v:
2008 Electrical Design of Advanced Packaging and Systems Symposium.
This paper describes the impact of DRAM-caused power noise (especially simultaneous switching output noise) in DDR2 667 system. The power noise is regulated by adjusting the package inductance of power delivery nets, DQ driver strength, and the power
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ab02b415012ba0eddf1b825f9f18b3bb
https://doi.org/10.1109/edaps.2008.4736017
https://doi.org/10.1109/edaps.2008.4736017
Autor:
Hyungsoo Kim, Jong-Gwan Yook, Jin-Kyoung Du, Joong-Sik Kih, Kunwoo Park, Jungmin Kim, Yong-Ju Kim
Publikováno v:
2006 IEEE MTT-S International Microwave Symposium Digest.
The pole and residue values from vector fitting method were applied in this paper, which enables the extraction and implementation of the equivalent circuit to achieve the characteristics of board to package model for GHz frequency range. After the f
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::74743c92275af0aaa831219b9aeb1238
https://doi.org/10.1109/mwsym.2006.249818
https://doi.org/10.1109/mwsym.2006.249818
Autor:
Young-Kyoung Choi, Won-Joo Yun, Ki-Chang Kwean, Won Jun Choi, Seung-Wook Kwack, Young-Jung Choi, Shin-Deok Kang, Sang-hoon Shin, Joong-Sik Kih, Hyong-Uk Moon, Hyun-woo Lee, Kwan-Weon Kim, Hyang-Hwa Choi, Hyeng-Ouk Lee, Nak-Kyu Park, Jung-Woo Lee, Young Ju Kim, Dong Uk Lee, Jin-Hong Ahn, Ye-Seok Yang
Publikováno v:
2006 IEEE Asian Solid-State Circuits Conference.
A new low power, low cost and high performance register-controlled digital delay locked loop with wide locking range is presented. The DLL has dual loops with single replica block, duty cycle correction enhance controller (DCCEC), smart power down co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6ce5ff40096b319a115e06fb9c94ea05
https://doi.org/10.1109/asscc.2006.357916
https://doi.org/10.1109/asscc.2006.357916
Autor:
Sung-Won Shin, Jin-Hong Ahn, Joong-Sik Kih, Se Jun Kim, Hee-Bok Kang, Jae-Jin Lee, Jae-Bum Ko, Sang Hoon Hong
Publikováno v:
2005 IEEE Asian Solid-State Circuits Conference.
A 128Mb pseudo SRAM is developed using a special type of architecture with the purpose of effectively reducing the standby current. Standby current, especially the off leakage current is becoming more difficult problem to handle in modern devices bec
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::080dd5d293c92f54a2ce5d2ba56ebfe0
https://doi.org/10.1109/asscc.2005.251678
https://doi.org/10.1109/asscc.2005.251678
Autor:
Joong-Sik Kih, Jin-Hong Ahn, Won-Joo Yun, Young-Jung Choi, Seung-Wook Kwack, Sin-Deok Kang, Hyung-Wook Moon, Dong Uk Lee, Ki-Chang Kwean, Hyun-woo Lee, Kwan-Weon Kim
Publikováno v:
2005 IEEE Asian Solid-State Circuits Conference.
A new low power high performance register-controlled digital delay locked loop (LPRCDLL) is presented. The circuit has fine delay compensation ability, fast delay compensation according to external voltage variation, and inherent duty correction. The
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::efc8e632b8558ab60e6dcf4eb35eb38b
https://doi.org/10.1109/asscc.2005.251750
https://doi.org/10.1109/asscc.2005.251750
Publikováno v:
2005 IEEE Asian Solid-State Circuits Conference.
A digitally controlled phase-locked loop (DCPLL) is described. The DCPLL has basically the same structure as a conventional analog PLL except for a tracking analog-to-digital converter (ADC). The tracking ADC generates the control signal for voltage
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::71188312d843e3d2e7bf19d393b35db2
https://doi.org/10.1109/asscc.2005.251744
https://doi.org/10.1109/asscc.2005.251744
Publikováno v:
Proceedings Electronic Components and Technology, 2005. ECTC '05..
In this paper, we divided the switching current of output driver for single ended voltage mode signaling into two parts according to current flowing path. They are the direct current path and the channel current path, respectively. The impedance of t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::453f6736f34d95e27b87676fb6c42522
https://doi.org/10.1109/ectc.2005.1442030
https://doi.org/10.1109/ectc.2005.1442030
Publikováno v:
Proceedings of the 30th European Solid-State Circuits Conference.
A digital delay locked loop (DLL) for 1.2 Gb/s/pin double data rate (DDR) SDRAM is described, which incorporates duty cycle correction (DCC). The DCC locking information is also stored as a digital code for fast wake-up from power-down mode and DCC c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::729f54f00be022cf37878a53e48d31b2
https://doi.org/10.1109/esscir.2004.1356697
https://doi.org/10.1109/esscir.2004.1356697