Zobrazeno 1 - 3
of 3
pro vyhledávání: '"Jonnatan Mendoza"'
Autor:
Francesco Minervini, Oscar Palomar, Osman Unsal, Enrico Reggiani, Josue Quiroga, Joan Marimon, Carlos Rojas, Roger Figueras, Abraham Ruiz, Alberto Gonzalez, Jonnatan Mendoza, Ivan Vargas, César Hernandez, Joan Cabre, Lina Khoirunisya, Mustapha Bouhali, Julian Pavon, Francesc Moll, Mauro Olivieri, Mario Kovac, Mate Kovac, Leon Dragic, Mateo Valero, Adrian Cristal
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 20:1-25
The maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of specialized hardware in processor cores for the High Performance C
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::bc3378dd4f74ffe9a1b5d410072a790b
https://doi.org/10.1145/3575861
https://doi.org/10.1145/3575861
Autor:
Guillem Cabo, Gerard Candon, Xavier Carril, Max Doblas, Marc Dominguez, Alberto Gonzalez, Cesar Hernandez, Victor Jimenez, Vatistas Kostalampros, Ruben Langarita, Neiel Leyva, Guillem Lopez-Paradis, Jonnatan Mendoza, Francesco Minervini, Julian Pavon, Cristobal Ramirez, Narcis Rodas, Enrico Reggiani, Mario Rodriguez, Carlos Rojas, Abraham Ruiz, Victor Soria, Alejandro Suanes, Ivan Vargas, Roger Figueras, Pau Fontova, Joan Marimon, Victor Montabes, Adrian Cristal, Carles Hernandez, Ricardo Martinez, Miquel Moreto, Francesc Moll, Oscar Palomar, Marco A. Ramirez, Antonio Rubio, Jordi Sacristan, Francesc Serra-Graells, Nehir Sonmez, Lluis Teres, Osman Unsal, Mateo Valero, Luis Villa
Publikováno v:
2022 37th Conference on Design of Circuits and Integrated Circuits (DCIS).
This paper describes the design, verification, implementation and fabrication of the Drac Vector IN-Order (DVINO) processor, a RISC-V vector processor capable of booting Linux jointly developed by BSC, CIC-IPN, IMB-CNM (CSIC), and UPC. The DVINO proc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cb054b1271612342413b6406039483c8
https://doi.org/10.1109/dcis55711.2022.9970128
https://doi.org/10.1109/dcis55711.2022.9970128
Autor:
Jaume Abella, Calvin Bulla, Guillem Cabo, Francisco J. Cazorla, Adrian Cristal, Max Doblas, Roger Figueras, Alberto Gonzalez, Carles Hernandez, Cesar Hernandez, Victor Jimenez, Leonidas Kosmidis, Vatistas Kostalabros, Ruben Langarita, Neiel Leyva, Guillem Lopez-Paradis, Joan Marimon, Ricardo Martinez, Jonnatan Mendoza, Francesc Moll, Miquel Moreto, Julian Pavon, Cristobal Ramirez, Marco A. Ramirez, Carlos Rojas, Antonio Rubio, Abraham Ruiz, Nehir Sonmez, Victor Soria, Lluis Teres, Osman Unsal, Mateo Valero, Ivan Vargas, Luis Villa
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
DCIS
2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)
Universitat Politècnica de Catalunya (UPC)
DCIS
2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)
©2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ad747e8a3c5eec9eef9a1829a6c57796
