Zobrazeno 1 - 10
of 32
pro vyhledávání: '"Jong-Son Lyu"'
Publikováno v:
ETRI Journal. 20:241-250
The structure and electrical characteristics of metal-ferroelectric-semiconductor FET(MFSFET) for a single transistor memory are presented. The MFSFET was comprised of polysilicon islands as source/drain electrodes and film as a gate dielectric. The
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::058f6a9dd3ccffec4d11c131880e56ac
https://doi.org/10.4218/etrij.98.0198.0208
https://doi.org/10.4218/etrij.98.0198.0208
Publikováno v:
IEEE Transactions on Electron Devices. 45:2153-2160
The effects of a buffer layer structure on polysilicon buffered LOCOS were shown and analyzed. Sample wafers are classified into four groups to show the effect of the buffer layer structure. The structures of the four different buffer layers are mono
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1af902c1f5b5d55b1c93f86f8dda07ab
https://doi.org/10.1109/16.725249
https://doi.org/10.1109/16.725249
Publikováno v:
ETRI Journal. 17:1-12
A novel body-tied silicon-on-insulator(SOI) n-channel metal-oxide-semiconductor field-effect transistor with grounded body electrode named GBSOI nMOSFET has been developed by wafer bonding and etch-back technology. It has no floating body effect such
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1595ac2510b68c23f59615541e74127a
https://doi.org/10.4218/etrij.96.0196.0041
https://doi.org/10.4218/etrij.96.0196.0041
Publikováno v:
IEEE Transactions on Electron Devices. 41:726-733
An analytical model for SOI nMOSFET with a floating body is developed to describe the I/sub ds/-V/sub ds/ characteristics. Considering all current components in MOSFET as well as parasitic BJT, this study evaluates body potential, investigates the co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::66a8543e3f9b29951a4a93d92a403b58
https://doi.org/10.1109/16.285024
https://doi.org/10.1109/16.285024
Autor:
Jong-Son Lyu
Publikováno v:
ETRI Journal. 15:10-25
Interface trap densities at gate oxide/silicon substrate () interfaces of metal oxide semiconductor field-effect transistors (MOSFETs) were determined from the substrate bias dependence of the subthreshold slope measurement. This method enables the c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f457438c2c6fdf8bf91bfb11e5ac0245
https://doi.org/10.4218/etrij.93.0193.0002
https://doi.org/10.4218/etrij.93.0193.0002
Publikováno v:
IEEE Electron Device Letters. 17:109-111
Advanced bipolar transistors used for high speed integrated circuits tend to drive high current density. As a result, base-widening occurs and device performance degrades. One of the methods to alleviate the base-widening is to form retrograde collec
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1092a1ac1af4ee536eb799d69c069a33
https://doi.org/10.1109/55.485183
https://doi.org/10.1109/55.485183
Publikováno v:
IEEE Electron Device Letters. 16:236-238
Leakage current through the parasitic channel formed at the sidewall of the SOI active region has been investigated by measuring the subthreshold I-V characteristics. Partially depleted (PD, /spl sim/2500 /spl Aring/) and fully depleted (FD, /spl sim
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::11da452d2515ca6ee1cebe2b82c3fb74
https://doi.org/10.1109/55.790720
https://doi.org/10.1109/55.790720
Publikováno v:
Proceedings of 1993 IEEE International SOI Conference.
N-channel SOI MOSFET was fabricated by using the silicon direct bonding (SDB) technology, where its body was tied with a grounded p/sup +/ polysilicon for eliminating the substrate floating effect. Fabricated SOI MOSFETs show no kinks on their drain
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::92aabb90e45ec9817a00fc5e1846fb38
https://doi.org/10.1109/soi.1993.344574
https://doi.org/10.1109/soi.1993.344574
Publikováno v:
International Electron Devices Meeting. Technical Digest.
The structure and electrical characteristics of a metal-ferroelectric-semiconductor field-effect transistor (MFSFET) for a single transistor memory are presented. We developed a novel MFSFET with polysilicon islands as source/drain electrodes and a B
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c2dd8343bd536d3320e98eb35e3ae6af
https://doi.org/10.1109/iedm.1996.553850
https://doi.org/10.1109/iedm.1996.553850
Publikováno v:
1996 IEEE International SOI Conference Proceedings.
We developed a new SOI device with a self-aligned polysilicon gate on the recessed channel region and obtained low source/drain resistance, symmetrical I/sub D/-V/sub DS/ characteristics and high breakdown voltage (BV/sub DSS/). The self-alignment wa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d485d601c2dccbb1bc2902b1d1d9d59e
https://doi.org/10.1109/soi.1996.552524
https://doi.org/10.1109/soi.1996.552524