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pro vyhledávání: '"Jonathan Hsia"'
Autor:
Jonathan Hsia, 夏宇鵬
105
This thesis presents an array digital-to-analog converter (DAC), including a sampling rate of 200Ms/s and a resolution of 12 bits. The whole structure is completed with segmented topology and switched-current mode, which is composed with 3-b
This thesis presents an array digital-to-analog converter (DAC), including a sampling rate of 200Ms/s and a resolution of 12 bits. The whole structure is completed with segmented topology and switched-current mode, which is composed with 3-b
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/72gj5x
Publikováno v:
2018 7th International Symposium on Next Generation Electronics (ISNE).
This paper presents a 10-bit 200-Msample/s switched-current (SI) pipelined analog-to-digital converter (ADC) for analog front-end (AFE) of XDSL. In the proposed switched-current sample-and-hold circuit (SH), the current mirror is designed with active
Publikováno v:
2017 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW).
This paper proposes a 12-bit DAC using switched-current technique and segmented topology, which includes a 9-bit thermometer code and a 3-bit binary code and a 125-MHz fully differential current- mode line driver for a better noise immunity at high f