Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Jolanta Malesinska"'
A new method for characterization of gate overlap capacitances and effective channel size in MOSFETs
Publikováno v:
Solid-State Electronics. 159:184-190
Methods for characterization of MOSFET gate overlap capacitances are briefly discussed. Considerations of their shortcomings due to the neglected shortening and/or narrowing of the MOSFET channel in relation to its drawn size have led to development
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::076c2da1500f11d4cdeb611d05574545
https://doi.org/10.1016/j.sse.2019.03.058
https://doi.org/10.1016/j.sse.2019.03.058
Autor:
Jolanta Malesinska, Daniel Tomaszewski, Krzysztof Kucharski, Lidia Łukasiak, Grzegorz Gluszko
Publikováno v:
Solid-State Electronics. 128:92-101
An alternative method for an extraction of the MOSFET threshold voltage has been proposed. It is based on an analysis of the MOSFET source-bulk junction capacitance behavior as a function of the gate-source voltage. The effect of the channel current
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5bab4a9fde4be8b89c133f425da390aa
https://doi.org/10.1016/j.sse.2016.10.006
https://doi.org/10.1016/j.sse.2016.10.006
Autor:
Daniel Tomaszewski, Jolanta Malesinska, Lidia Lukasiak, Grzegorz Gluszko, Krzysztof Kucharski
Publikováno v:
2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS).
A method for extraction of the threshold voltage corresponding to the front and back interface in FDSOI MOSFETs is proposed. The approach is based on the nonlinear behavior of the capacitances between the source and front/back gate. The method has be
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::720b8d7070b463f81b632d93ee8275cf
https://doi.org/10.1109/ulis.2017.7962568
https://doi.org/10.1109/ulis.2017.7962568
Publikováno v:
2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS).
A method for an extraction of a MOSFET threshold voltage has been proposed. It is based on an analysis of the MOSFET source-bulk junction capacitance behavior along the gate-source voltage variation. A channel current effect on the threshold voltage
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::09c4a7310b34bcfd323d9b971d62a688
https://doi.org/10.1109/ulis.2016.7440083
https://doi.org/10.1109/ulis.2016.7440083
Publikováno v:
MIXDES
Two simple non-iterative methods of MOSFET threshold voltage parameter extraction are presented. They are valid for threshold voltage-based and charge-based compact models of MOS transistors. The methods take advantage of the features of the model fo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e696a45336ff6bd36d48618b4fa9520b
https://doi.org/10.1109/mixdes.2015.7208514
https://doi.org/10.1109/mixdes.2015.7208514
Autor:
Jolanta Malesinska, Michal Zaborowski, Andrzej Sierakowski, Dariusz Szmigiel, Krzysztof Domański, Daniel Tomaszewski, Krzysztof Kucharski, Grzegorz Gluszko
Publikováno v:
Proceedings of the 2015 International Conference on Microelectronic Test Structures.
A method for a direct extraction of individual serial resistances of MOSFET source/drain electrodes is presented. It is based on the device I–V characteristics in a saturation range measured for two device configurations inverted with respect to so
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8467f48d0fdce56406f4d935d0187de4
https://doi.org/10.1109/icmts.2015.7106120
https://doi.org/10.1109/icmts.2015.7106120
Publikováno v:
MIXDES
A method for fabrication of junctionless SOI MOS devices for sensor applications is presented in the paper. Two groups of devices, namely FinFET-type devices, and wide MOSFETs have been designed and manufactured in a single process sequence on the sa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8362d6ec191810691d5354ae6abc62ef
https://doi.org/10.1109/mixdes.2014.6872220
https://doi.org/10.1109/mixdes.2014.6872220
Autor:
Jolanta Malesinska, Krzysztof Kucharski, Daniel Tomaszewski, Grzegorz Gluszko, Michal Zaborowski
Publikováno v:
MIXDES
A simple method for data analysis in semiconductor device characterization and compact modeling is proposed. The method allows for a direct comparison of data originating from different sources, e.g. from measurement and simulation. The comparison is
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f0c78cc82088e01c6b38bb1a77851a28
https://doi.org/10.1109/mixdes.2014.6872157
https://doi.org/10.1109/mixdes.2014.6872157
Publikováno v:
SPIE Proceedings.
In this study, measurements of resistance of polysilicon resistors with different widths have been done over the whole surface of the SOI wafers. The obtained results have been used to determine changes in their width, which is equivalent with shorte
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5b3a8d3a24342ef7dd63d93260bf7c92
https://doi.org/10.1117/12.2031057
https://doi.org/10.1117/12.2031057
Autor:
J. Lesinski, A. Kokoszka, Daniel Tomaszewski, M. Grodner, Jolanta Malesinska, Arkadiusz Malinowski, Krzysztof Kucharski, D. Obrbski
Publikováno v:
2007 14th International Conference on Mixed Design of Integrated Circuits and Systems.
A MPW service has been arranged in the ITE in order to offer facility to academies for prototyping of CMOS ICs. This service is based on the proprietary CMOS process. The technology has been characterized via electrical measurements of dedicated test
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3041e5a35fb6002560d13971a878dbc3
https://doi.org/10.1109/mixdes.2007.4286122
https://doi.org/10.1109/mixdes.2007.4286122