Zobrazeno 1 - 3
of 3
pro vyhledávání: '"John Steven Dodson"'
Autor:
James A. Marcella, Jeffrey A. Stuecheli, Brad W. Michael, Stephen J. Powell, John Steven Dodson, William J. Starke, Eric E. Retter
Publikováno v:
IBM Journal of Research and Development. 62:3:1-3:13
The IBM POWER9 processor chipset provides a variety of system memory architecture interfaces to enable highly differentiated system offerings: a high bandwidth, high capacity, highly reliable, buffered architecture; a compute-density-optimized direct
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ec057287906d0e9a2ef617abd9cd4280
https://doi.org/10.1147/jrd.2018.2846159
https://doi.org/10.1147/jrd.2018.2846159
Publikováno v:
IBM Journal of Research and Development. 46:5-25
The IBM POWER4 is a new microprocessor organized in a system structure that includes new technology to form systems. The name POWER4 as used in this context refers not only to a chip, but also to the structure used to interconnect chips to form syste
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4d0b5f316d99360639828f2a74706e29
https://doi.org/10.1147/rd.461.0005
https://doi.org/10.1147/rd.461.0005
Autor:
William J. Starke, Guy Lynn Guthrie, Patricia M. Sagmeister, Charles F. Marino, Florian A. Auernhammer, M. S. Siegel, John Steven Dodson, David M. Daly, Bart Blaner, Jeffrey A. Stuecheli
Publikováno v:
IBM Journal of Research and Development. 59:3:1-3:13
In this paper, we describe the IBM POWER8™ cache, interconnect, memory, and input/output subsystems, collectively referred to as the “nest.” This paper focuses on the enhancements made to the nest to achieve balanced and scalable designs, rangi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fe2d630e0d0814c510f8b629a40af02a
https://doi.org/10.1147/jrd.2014.2376131
https://doi.org/10.1147/jrd.2014.2376131