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pro vyhledávání: '"John R. Feehrer"'
Autor:
Sebastian Turullols, Ali Vahidsafa, Sivaramakrishnan Ram, Sumti Jairath, Paul N. Loewenstein, John R. Feehrer, David Smentek
Publikováno v:
IEEE Micro. 33:48-57
The Oracle Sparc T5 processor more than doubles the throughput of the Sparc T4 processor, while increasing per-thread performance, scalability, power efficiency, and I/O bandwidth. The authors detail the improvements and new features leading to this
Autor:
Stephen E. Phillips, John R. Feehrer, P. Rotker, Paul Gingras, M. Shih, John R. Heath, P. Yakutis
Publikováno v:
IEEE Micro. 29:36-47
To bring the benefits of CMT to larger workloads, these systems had to scale beyond a single socket. Because CMT requires massive memory bandwidth to achieve adequate throughput performance, the challenge was to develop a coherency link and fabric th
Publikováno v:
MCSoC
The I/O Hub (IOH) for SPARC M7 processor-based servers is an ASIC providing high performance, flexible, and virtualized access to multiple Gen3 PCIe devices. The IOH's top-level interconnect, connecting multiple PCIe Root Complexes to a set of SPARC
Autor:
Stephen E. Phillips, John R. Feehrer, Paul Gingras, P. Rotker, Milton Shih, Peter Yakutis, John R. Heath
Publikováno v:
IEEE Micro. :1-1
This paper describes the micro-architecture of a Coherency Hub (CoHub) ASIC for a 4-socket highly-threaded multiprocessor using Sun's UltraSPARC ¯ T2 Plus processor. UltraSPARC T2 Plus is an 8-core CMT processor in the Sun Servers with CoolThreadsTM
Autor:
John R. Feehrer, L.H. Ramfelt
Publikováno v:
IEEE Transactions on Parallel and Distributed Systems. 7:605-611
Deflection routing resolves output port contention in packet switched multiprocessor interconnection networks by granting the preferred port to the highest priority packet and directing contending packets out other ports. When combined with optical l
Autor:
John R. Feehrer
Publikováno v:
Journal of Lightwave Technology. 14:2698-2713
Time-of-flight synchronization is a new digital design methodology for optoelectronics that eliminates latches, allowing higher clock rates than alternative timing schemes. Synchronization is accomplished by precisely balancing connection delays. Cir
Publikováno v:
SIGCOMM
We describe the design and implementation of a packet-switched fiber optic interconnect prototype with a ShuffleNet topology, intended for use in shared-memory multiprocessors. Coupled with existing latency-hiding mechanisms, it can reduce latency to
Autor:
Vincent P. Heuring, Todd Main, Harry F. Jordan, John R. Feehrer, Carl E. Love, R. J. Feuerstein
Publikováno v:
Applied optics. 33(8)
The implementation of what we believe to be the first stored-program digital optical computer is described. The implementation domain consists of lithium niobate directional couplers that are modified to provide optical control and are interconnected
Autor:
John R. Feehrer, Harry F. Jordan
Publikováno v:
Applied Optics. 34:8125
Time-of-flight synchronized optoelectronic circuits capitalize on the highly controllable delays of optical waveguides. Circuits have no latches; synchronization is achieved by adjustment of the lengths of waveguides that connect circuit elements. Cl
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