Zobrazeno 1 - 8
of 8
pro vyhledávání: '"John P. Erdeljac"'
Publikováno v:
[Proceedings] APEC '92 Seventh Annual Applied Power Electronics Conference and Exposition.
A 2.0 mu m BiCMOS process incorporating 30 V bipolar, 5-50 V CMOS, precision analog elements, and 45 V power DMOS transistors with 2.0 m Omega cm/sup 2/ R/sub DSON/ area is presented. The process is compatible with a mature mixed-signal application-s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::62a8857ca6c3765a6ce9b612a1e1f9c1
https://doi.org/10.1109/apec.1992.228366
https://doi.org/10.1109/apec.1992.228366
Autor:
Chin-Yu Tsai, J.-Y. Yang, Taylor R. Efland, Jozef C. Mitros, J. Arch, Louis N. Hutter, H.-T. Yuan, John P. Erdeljac
Publikováno v:
International Electron Devices Meeting. Technical Digest.
The competitive PC peripheral application market drives the goal to develop a compressed, low-cost BiCMOS power technology with state-of-the-art specific-on-resistance (R/sub sp/) at the 20 V node. The 20 V rated lateral power device is difficult to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::40a51950177e7856904c0675e0f3c7c1
https://doi.org/10.1109/iedm.1996.553628
https://doi.org/10.1109/iedm.1996.553628
Publikováno v:
Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting.
A complementary bipolar technology with full dielectric isolation merges 30 V capable polyemitter NPN and PNP transistors with capacitors, polysilicon resistors, Schottky diodes, and fuses. A 6000 V//spl mu/s slew rate, 400 MHz bandwidth current feed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f87146b9d898d34712902ce3851ea914
https://doi.org/10.1109/bipol.1997.647353
https://doi.org/10.1109/bipol.1997.647353
Publikováno v:
Proceedings of 9th International Symposium on Power Semiconductor Devices and IC's.
This work presents a new reduced-surface-drain (RSD) type of LDMOS in comparison with very thin RESURF (VTR) and conventional (CONV) devices for 20 V BiCMOS market applications. Competitive performance results obtained for the RSD, VTR and CONV devic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c770e823c8a966417c73f76df511b691
https://doi.org/10.1109/ispsd.1997.601466
https://doi.org/10.1109/ispsd.1997.601466
Publikováno v:
Proceedings of 9th International Symposium on Power Semiconductor Devices and IC's.
PCMCIA cards are used to add a variety of features to portable computers-modems, LANs, GPS, etc. Some means of switching power to the inserted PCMCIA card is required: this paper describes the design and process technology for a second-generation, si
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6c89cce79ea1ee4e00216fba3356137f
https://doi.org/10.1109/ispsd.1997.601511
https://doi.org/10.1109/ispsd.1997.601511
Autor:
Jozef C. Mitros, A. Tessmer, John P. Erdeljac, Taylor R. Efland, L.X. Springer, Jeffrey P. Smith, Chin-Yu Tsai, Sameer Pendharkar, P. Madhani, Louis N. Hutter
Publikováno v:
Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting.
A 0.7 /spl mu/m BiCMOS technology is described. The baseline process offers digital and analog CMOS, a variety of bipolar devices, poly resistors, poly-poly capacitors, Schottky diodes, noise isolation, and 3 levels of metal. Power DMOS transistors w
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2f308d1bc6543557158a151576de7fec
https://doi.org/10.1109/bipol.1997.647424
https://doi.org/10.1109/bipol.1997.647424
Autor:
Jeffrey P. Smith, John P. Erdeljac, Taylor R. Efland, Louis N. Hutter, Sameer Pendharkar, Jozef C. Mitros, A. Tessmer, C.-Y. Tsai
Publikováno v:
International Electron Devices Meeting. IEDM Technical Digest.
In this work, performance advances are featured for new and improved multi voltage rated (16 V to 60 V) LDMOS. Performance improvements were achieved by leveraging off of (1) an optimized off-set, photo aligned, coimplanted double-diffused well (DWL)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::55e1e6e6efbab1f7b030a67e7e70ce06
https://doi.org/10.1109/iedm.1997.650401
https://doi.org/10.1109/iedm.1997.650401
Autor:
Louis N. Hutter, Walter Bucksch, Konrad Wagensohner, Erich Bayer, Kevin Scoones, John P. Erdeljac
Publikováno v:
Proceedings of Bipolar/Bicmos Circuits and Technology Meeting.
A 1.0 micron BiCMOS process, with lateral DMOS as an available process extension, is presented for mixed-signal and power applications, providing a broad range of active and passive components. The DMOS transistor offers 45-60 V capability with Rsp=1
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::982b130c7910879c80eed20cc2e3bc8e
https://doi.org/10.1109/bipol.1995.493883
https://doi.org/10.1109/bipol.1995.493883